Note: If neither the system BIOS nor the add-in card video BIOS supply the
SUBSYSTEM_ID and SUBSYSTEM_VENDOR_ID, their values default to the
DEVICE_ID and VENDOR_ID respectively inside the chip.
4.3 Serial Flash Read/Write Timing
Figure 4–4 Serial Flash Write/Read Timing
Table 4–2 Serial Flash Write/Read Timing Parameters for the Bootup Case
Symbol
Description
Min (ns)
Max (ns)
Tcss
ROMCSb falling edge to first clock sent to the device.
110
Tsck
ROMSCK period.
70
Twl
ROMSCK low time.
30
Twh
ROMSCK high time.
30
Tsu
ROMSI data setup.
20
Th
ROMSI data hold.
40
Ty
ROMSO data valid.
0
20
Tcsh
Last clock sent to the ROMCSb rising edge.
70
SCLK = 100 MHz, XTALIN = 27 MHz, ROM_CNTL.SCK_PRESCALE_CRYSTAL_CLK=0x1
50
Timing Specifications
"Vega 10" Databook
56006_1.00
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2017
Advanced Micro Devices, Inc.
AMD Confidential - Do not duplicate.
