3.19 AMD PowerXpress™ Interface
Table 3–21 AMD PowerXpress™ Interface
Pin
Name
Type
PD/
PU
Description
PX_EN
O
(VDDAN_33)
PD
On/off regulator control signal for AMD ZeroCore Power feature (BACO
mode).
High (3.3 V) switches the regulators off (enter BACO mode).
Low (0 V) switches the regulators on. (Default)
PX_EN is tri-state before internal PWRGOOD is asserted and PERSTb is
de-asserted.
Can be left unconnected if not used.
3.20 Power and Ground Descriptions and Operating Conditions
Note:
•
All power and ground pins must always be connected.
Table 3–22 Power and Ground Descriptions and Operating Conditions
Pin Name
Voltage
Description
VDDCI_MEM
0.9 V
Isolated (clean) core power for the l/O logic of HBM2PHY.
FB_VDDCI_MEM
-
Provides VDDCI_MEM feedback path to the regulator.
If unused, connect to test point or leave unconnected.
VDDIO_MEM
1.35 V
I/O power for the memory interface
FB_VDDIO_MEM_GPU
-
Provides VDDIO_MEM feedback path from HBM2PHY to the
regulator.
If unused, connect to test point or leave unconnected.
FB_VDDIO_MEM_HBM
-
Provides VDDIO_MEM feedback path from DRAM to the regulator.
If unused, connect to test point or leave unconnected.
VDDCR_HBM
1.35 V
Power for internal logic of DRAM.
FB_VDDCR_HBM
-
Provides VDDCR_HBM feedback path to the regulator.
If unused, connect to test point or leave unconnected.
VPP
2.5 V
Pump voltage of DRAM.
VDDCR_BACO
0.9 V
Separate core power for the PCIe bus logic.
Can be supplied by the same voltage regulator that powers
VDD_080_EFUSE and VDD_080, but a bead should be used to
isolate VDDCR_BACO.
VDD_080_EFUSE
0.9 V
Efuse internal supply.
Can be merged with VDD_080 and supplied by the same regulator.
VDD_080
0.9 V
Supply for TMDP, PLL, PCIE, DFS, and XTAL.
VDD_18
1.8 V
1.8-V supply for TMDP, PLL, PCIE, CLKstretch, HBM2PHY, XTAL,
and TMON.
Must remain powered whenever VDDAN_33 is powered.
VDDAN_18
1.8 V
1.8-V supply for GPIO and AUX.
Must remain powered whenever VDDAN_33 is powered.
Can be merged and share the same regulator with VDD_18.
36
Signal Descriptions
"Vega 10" Databook
56006_1.00
©
2017
Advanced Micro Devices, Inc.
AMD Confidential - Do not duplicate.
