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AMD SP5100 Databook
44409 Rev. 1.70 October 10
46
Signal Description
Ball Name
(
Default Function
in Blue
)
Type
Voltage and
Domain
Internal
Resistor
(
Default in
Blue
)
Default
Type
(
Default
State in
Blue
)
Functional Description
IDE_RST#/
F_RST#/
IMC_GPO3
OD
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Output
Low
IDE Reset/
Integrated Microcontroller
(IMC) GPO 3
IMC_GPIO[7:4]
I/O
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) GPIO [7:4]
IMC_GPIO[9:8]
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) GPIO [9:8]
IMC_PWM0
◊ /
IMC_GPIO10
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) PWM 0/
IMC GPIO 10
SCL2
◊
/
IMC_GPIO11
I/O
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Input
SMBus Clock 2/
Integrated Microcontroller
(IMC) GPIO 11
SDA2
◊ /
IMC_GPIO12
I/O
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Input
SMBus Data 2/
Integrated Microcontroller
(IMC) GPIO 12
SCL3_LV
◊ /
IMC_GPIO13
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Low Voltage SMBus Clock 3/
Integrated Microcontroller
(IMC) GPIO 13
SDA3_LV
◊ /
IMC_GPIO14
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Low Voltage SMBus Data 3 /
Integrated Microcontroller
(IMC) GPIO 14
IMC_PWM1
◊ /
IMC_GPIO15
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) PWM 1/
IMC GPIO 15
IMC_PWM2
◊ /
IMC_GPO16 §
I/O
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) PWM 2/
IMC GPO 16
IMC_PWM3
◊ /
IMC_GPO17 §
I/O
3.3V_S5
(5-V tolerance)
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) PWM 3/
IMC GPO 17
IMC_GPIO[41:18]
I/O
3.3V_S5
10-k
Ω PU
10-k
Ω PD
Input
Integrated Microcontroller
(IMC) GPIO [41:18]
Notes:
For information on how to configure the GPIO pins, see the
AMD SP5100 Register Reference
Guide
. Notice that the IMC GPIOs can also be used as general purpose GPIOs.
* The “default function” and the “default state” refer to function and state of the pin after
deassertion of PCI host bus reset (A_RST#), i.e., right after system power up or reset.
◊
The IMC PWM and SMBus functions are not available if the IMC is disabled via the strap setting
on AZ_RST#.
§ To avoid corrupting the ROM type strap settings, IMC_GPO[17:16] must not be driven from an
external source until after RSMRST# had been de-asserted.
7.16 Integrated Micro-Controller (IMC)
Note:
Integrated Micro-Controller (IMC) interface advanced features are
not
supported by the SP5100.
However, the GPIOs on the IMC interface can be used like any other GPIO pins, with IMC enabled or