AMD Am186 ES, User Manual, Page: 13 / 192

Introduction and Overview xiii
PREFACE
INTRODUCTION AND OVERVIEW
DESIGN PHILOSOPHY
The Am186™ES and Am188™ES microcontrollers provide a low-cost, high-performance
solution for embedded system designers who wish to use the x86 architecture. By integrating
multiple functional blocks with the CPU, the Am186ES and Am188ES microcontrollers eliminate
the need for off-chip system-interface logic. It is possible to implement a fully functional system
with ROM and RAM, serial interfaces, and custom I/O capability without additional system-
interface logic.
The Am186ES and Am188ES microcontrollers can operate at frequencies up to 40 MHz.
And, the microcontrollers include an on-board PLL so that the input clock can be one-to-
one with the internal processor clock. The Am186ES and Am188ES microcontrollers are
available in versions operating at 20, 25, 33, and 40 MHz.
The Am186ES and Am188ES microcontrollers provide a natural migration path for 80C186/
188 designs that need performance and cost enhancements.
PURPOSE OF THIS MANUAL
This manual describes the technical features and programming interface of the Am186ES
and Am188ES microcontrollers.
INTENDED AUDIENCE
This manual is intended for computer hardware and software engineers and system
architects who are designing or are considering designing systems based on the Am186ES
and Am188ES microcontrollers.
USER’S MANUAL OVERVIEW
This manual contains information on the Am186ES and Am188ES microcontrollers and is
essential for system architects and design engineers. Additional information is available in
the form of data sheets, application notes, and other documentation that is provided with
software products and hardware-development tools.
The information in this manual is organized into 11 chapters and 1 appendix.
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Chapter 1 introduces the features and performance aspects of the Am186ES and
Am188ES microcontrollers.
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Chapter 2 describes the programmer’s model of the Am186 and Am188 family
microcontrollers, including the instruction set and register model.
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Chapter 3 provides an overview of the system interfaces, along with clocking
features.
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Chapter 4 provides a description of the peripheral control block along with power
management and reset configuration.
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Chapter 5 provides a description of the chip select unit.
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Chapter 6 provides a description of the refresh control unit.
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Chapter 7 provides a description of the on-chip interrupt controller.