Chip Selects
Am186™CC/CH/CU Microcontrollers User’s Manual
5-11
5.5.10
Comparison to Other Devices
■
General enhancements over the original 80C186 include bus mastering (three-state)
support for all chip selects, and activation only when the associated register is written,
not when it is read. In addition, each peripheral chip select asserts over a 256-byte
address range, which is twice the address range covered by peripheral chip selects in
the 80C186.
■
The chip selects for the Am186CC/CH/CU microcontrollers are similar to the Am186EM
and Am186ES microcontroller implementations except that the UCS and LCS space is
now capable of gluelessly supporting DRAM.
■
The chip selects are activated by a write to a register. Chip selects on previous Am186
devices activated with a read or a write.
■
The Am186CC/CH/CU microcontrollers offer eight peripheral chip selects rather than
the six in other Am186 implementations.
■
Unlike previous Am186 designs, PCS5 and PCS6 cannot be modified to provide latched
address bits A1 and A2.
■
Unlike previous Am186 products, no refresh information is ever provided on MCS3.
■
Unlike the Am186EM and Am186ES products, the Am186CC/CH/CU microcontrollers
do not support PSRAM mode.
■
Data bus width is programmable to x8 or x16. This feature was not previously available
on Am186 devices.
5.6
INITIALIZATION
On both an external and internal reset, the following occurs:
■
The microcontroller begins fetching and executing instructions starting at memory
location FFFF0h, so upper memory is typically used as instruction memory. To facilitate
this usage, UCS defaults to active on reset.
■
The LCS, MSC3–MCS0, and PCS7–PCS0 signals are
not active on reset; activation
requires a write access to the applicable memory chip select control register.
■
The MCS0, MCS3, and PCS7–PCS4 signals default to PIOs. See Table 5-1 on page 5-3
for the multiplexed pin defaults.
■
The value of the UMCS register defaults to F0
xBh, where x is 00y1b and y is the inverted
state of UCSX8 that was latched upon exiting reset. This defaults UCS to a 64-Kbyte
memory block starting at F0000h, with the AD bus enabled, UCS DRAM disabled,
external ready, and three wait states. This action allows the UCS memory region to
function as a non-DRAM bank so a system can boot from a nonvolatile memory device
before software switches this memory region to a DRAM bank.
■
The value of the LMCS register is set to 0F1Bh, which defaults LCS to a 64-Kbyte
memory block ending at 0FFFFh, with the AD bus enabled, LCS DRAM disabled,
external ready, and three wait states. However, the LCS chip select is not enabled until
software writes to the LMCS register.
■
The value of the PACS register is set to 0073h, and the MPCS register is set to 8183h,
which defaults PCS to a 256-byte block in I/O space starting at 0h, with external ready
and three wait states. However, the PCS chip select is not enabled until software writes
to both the PACS and MPCS registers.
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...