Preliminary Data Sheet
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AC101
06/04/01
B r o a d c o m
Document AC101-DS01-405-R¥¥¥¥¥
Media Interface
Page 9
The technology priorities are:
1
100BASE-TX, full-duplex
2
100BASE-TX, half-duplex
3
10BASE-T, full-duplex
4
10BASE-T half-duplex
Once the ANeg is complete, Reg. 1.5 is set, Reg. 1.[14:11] reflects negotiated speed and duplex mode, and the PHY enters
the negotiated transmission and reception state. This state will not change until link is lost or the PHY is reset through either
hardware or software, or the restart negotiation bit (Reg. 0.9) is set. See ”Register 0: Control Register” on page 24 and ”Reg-
ister 1: Status Register” on page 25.
P
ARALLEL
D
ETECTION
Because there are many devices in the field that do not support the ANeg process, but must still be communicated with, it
is necessary to detect and link through the Parallel Detection process.
The parallel detection circuit is enabled in the absence of FLPs. The circuit is able to detect:
•
Normal Link Pulse (NLP)
•
10BASE-T receive data
•
100BASE-TX idle
The mode of operation gets configured based on the technology of the incoming signal. If any of the above is detected, the
device automatically configures to match the detected operating speed in the half-duplex mode. This ability allows the device
to communicate with the legacy 10BASE-T and 100BASE-TX systems, while maintaining the flexibility of Auto-Negotiation.
D
IAGNOSTICS
Loopback Operation
Local Loopback and Remote Loopback are provided for testing purpose. They can be enabled by write to either Reg. 0.14
(LPBK) or Reg. 21.3 (EN_RPBK). See ”Register 0: Control Register” on page 24 and ”Register 21: Mode Control Register”
on page 32.
The Local Loopback routes transmitted data through the transmit path back to the receiving path’s clock and data recovery
module. The loopback data are presented to the PCS in 5 bits symbol format. This loopback is used to check the operation
of the 5-bit symbol decoder and the phase locked loop circuitry. In Local Loopback, the SD output is forced to logic one and
TXOP/N outputs are tri-stated.
In Remote Loopback, incoming data is passed through the equalizer and clock recovery, then looped back to the NRZI/MLT3
converter and then to the transmit driver. This loopback is used to ensure the device’s connection on the media side. It also
checks the operation of the device's internal adaptive equalizer, phase locked loop circuit, and wave-shaper synthesizer.
During Remote Loopback, signal detect (SD) output is forced to logic zero.
Cable Length Indicator
The PHY can detect the length of the cable it’s attached and display the result in Reg. 20.[7:4] (see ”Register 20: Cable Mea-
surement Register” on page 31). A reading of [0000] translates to < 10m cable used, [0001] translates to ~ 10 meter of cable,
and [1111] translates to 150 meter cable. The cable length value can be used by the network manage to determine the prop-
er connectivity of the cable and to manage the cable plant distribution