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Altera Nios II Embedded Evaluation Kit Cyclone III Edition User Manual Download Page 28

Altera Corporation 

Development Board Version 1.0.

3–4

July 2010

Nios II Embedded Evaluation Kit, Cyclone III Edition

Nios II Processor Systems

Nios II 3C25 Video Processor System

Location

You can locate the Nios II 3C25 Video Processor System in the <

install 

dir

>

/examples/video

 folder.

Description

Video, Ethernet and SD Card controller based processor system for LCD 
Color touch panel control, in-system update using SD Card, remote 
system update using Ethernet 

IP licenses required to ship design

■

SD/MMC SPI Core IP (with FAT file system) from El Camino

■

Triple Speed Ethernet-MAC Core license from Altera

■

Nios II IP evaluation license with Nios II EDS, shipping license from 
Altera

■

DDR SDRAM memory controller core shipping license from Altera 
(comes free with Quartus II Subscription edition)

About the Nios II 3C25 Video Processor 

CPU Platform 

The CPU platform for the Nios II Standard System consists of

■

Nios II/f cpu core

■

JTAG Debug Port

■

32KB Instruction Cache

■

32KB Data Cache

Summary of Contents for Nios II Embedded Evaluation Kit Cyclone III Edition

Page 1: ...101 Innovation Drive San Jose CA 95134 www altera com Nios II Embedded Evaluation Kit Cyclone III Edition User Guide Document Date July 2010 P25 36209 03 ...

Page 2: ... Altera s standard warranty but reserves the right to make changes to any products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device speci fications bef...

Page 3: ... Requirements 2 2 Power Up the Development Board 2 2 Chapter 3 Nios II Processor Systems Where to find the Nios II Processor Systems 3 3 Nios II 3C25 Standard Processor System 3 3 Nios II 3C25 Video Processor System 3 4 Chapter 4 Application Selector Utility Overview 4 1 Ready to Run SD Card Demonstrations 4 1 Running the Application Selector 4 1 In system Update using SD Card 4 2 Remote System Up...

Page 4: ...B 7 Create a BSP B 8 Build the project B 8 Build the boot code B 9 Modifying the Application Selector B 9 Changing the CFI flash map B 9 Appendix C Restoring the Factory Image Restoring the Original Flash Image Application Selector C 1 Rebuilding the Application Selector from Source Files C 2 Boot Code C 2 Hardware Image Catalog C 3 Application Selector Hardware Image C 3 Application Selector Soft...

Page 5: ...e design D 3 Where can I get the SD Card Controller IP License D 3 How do I add pictures so the Picture Viewer Application can find them D 3 How do I add my own design so the Application Selector can find and run it D 4 Where do I go to get more designs for the Nios II Embedded Evaluation Kit D 4 How do I open a design example in the Nios II IDE D 4 How do I restore the factory image D 5 How do I ...

Page 6: ...Altera Corporation vi July 2010 Preliminary Contents Contents ...

Page 7: ...mple software applications as a starting point for their own applications Success for an embedded system start rights from the evaluation stage Choosing the right platform development tools operating systems may be the difference between success and failure The Altera Nios II Embedded Evaluation Kit Cyclone III Edition is an evaluation kit that enables you to make these critical decisions with min...

Page 8: ...dded applications with source code to serve as examples for software device driver development Altera Application Selector with embedded Web Server Altera Picture Viewer Altera Mandelbrot Hardware and Software Tutorials to learn the embedded development flows My first FPGA design My first Nios II Software tutorial Ready to Run Demonstration applications from Altera s partners IP SD Card Controller...

Page 9: ...ign can be accomplished using drop down menus and drag and drop operations in SOPC Builder The sophistication of Altera s designs tools brings creating custom hardware processor systems within the reach of embedded developers About the Nios II Standard Design The starter reference design for the board entitled standard is located in the altera version kits cycloneIII_3c25_niosII examples folder Th...

Page 10: ...irectory there is a demos folder refer to Figure 1 1 on page 1 8 This is a repository of pre built example Nios II based processor systems that have been provided for demonstration and evaluation purposes only How are the demonstrations different from design examples Design examples located in the Install Dir examples folder are prebuilt processor systems that can be used as a starting point for y...

Page 11: ... Card core or high performance vector graphics engine middleware libraries for example Networks Stacks Graphics Library or graphics development tools for example PlanetWeb SpectraWorks Altia Design then the ready to run demonstrations help you make your evaluation process easy Ready to run demonstrations are provided in binary format only flash full Quartus II projects source code and IP licensing...

Page 12: ...Application selector utility Design examples Taking the next step Frequently asked questions f For a full description of the development boards and their design and use refer to the Cyclone III FPGA Starter Board Reference Manual and LCD Multimedia HSMC Reference Manual This user guide provides an overview of some of the applications For more information about key hardware components and the struc...

Page 13: ...proceeding check the contents of the kit Nios II Embedded Evaluation Board Cables and accessories Software Installation This section describes the following procedures Installing the Nios II Embedded Evaluation Kit Cyclone III Edition Installing the Quartus II Web Edition Software on page 1 9 Licensing the IP on page 1 11 Licensing the EL Camino SD Card Core on page 1 13 Installing the Nios II Emb...

Page 14: ...valuation Kit Installed Directory Structure Table 1 2 lists the file directory names and a description of their contents Table 1 2 Installed Directory Contents Part 1 of 2 Directory Name Description of Contents board_design_files Contains schematic layout assembly and bill of material board design files demos Contains a repository of example designs that may be useful for demonstration or evaluati...

Page 15: ...an request a DVD from the Altera IP and Software DVD Request Form page of the Altera website 2 Follow the on screen instructions to complete the installation process f If you have difficulty installing the Quartus II software refer to Quartus II Installation Licensing for Windows and Linux Workstations The Quartus II Web Edition software includes the following items documents Contains the Nios II ...

Page 16: ...ion in your system Verify functionality of your design and quickly and easily evaluate its size and speed Generate time limited device programming files for designs that include MegaCore functions Program a device and verify your design in hardware 1 The OpenCore Plus hardware evaluation feature is an evaluation tool for prototyping only You must purchase a license to use a MegaCore function in pr...

Page 17: ... megafunctions in a design the device can operate for a longer time or indefinitely Untethered the design runs for a limited time To ship designs with the Nios II IP Core you need to obtain a license for the Nios II IP IP NIOS To obtain a license you can 1 Contact your local Altera representative at www altera com corporate contact con index html 2 Use the Altera Tools Support at www altera com co...

Page 18: ... kits using the Micrium MicroC OS II RTOS To generate software to run on other boards ship in a product or both you must obtain a license To obtain a license for the Micrium MicroC OS II RTOS contact Micrium today Altera IP Base Suite A high performance memory controller for the on board DDR SDRAM memory is available from Altera Finite Impulse Response FIR Compiler Fast Fourier Transform FFT Compi...

Page 19: ...rom El Camino However if your particular application has no need to access the SD Card then you do not need to include the SD Card core in your system Simply uncheck this core or delete it and regenerate the system You should now be able to rebuild the hardware system without error If your design requires access to the on board SD Card then you can request an evaluation license or purchase the SD ...

Page 20: ...Altera Corporation Development Board Version 1 0 1 14 July 2010 Nios II Embedded Evaluation Kit Cyclone III Edition Getting Started ...

Page 21: ...port Power and analog devices from Linear Technology Memory 256 Mbit DDR SDRAM 1 Mbyte Synchronous SRAM 16 Mbytes Intel P30 P33 flash Clocking 50 MHz on board oscillator Switches and indicators Six push buttons total 4 user controlled Four user controlled LEDs LCD Daughtercard LCD Touch screen Display 800 X 480 pixel size 10 bit VGA DAC Video Decoder 24 bit Audio Codec RS232 transceiver SD Flash 1...

Page 22: ... USB Blaster circuitry for FPGA programming 1 The USB Blaster driver software is provided with the Quartus II software installation Communication between the host computer and the development board requires that the USB Blaster driver software be set up Power Up the Development Board To power up the development board perform the following steps 1 Ensure that the red on off switch SW1 on the back s...

Page 23: ...2 3 Development Board Version 1 0 Altera Corporation Nios II Embedded Evaluation Kit Cyclone III Edition July 2010 Power Up the Development Board Figure 2 1 Development Board Setup Welcome Screen ...

Page 24: ...Altera Corporation Development Board Version 1 0 2 4 July 2010 Nios II Embedded Evaluation Kit Cyclone III Edition Development Board Setup ...

Page 25: ...S 2 RS 232 Ports Touch Panel Module 10 100 Ethernet PHY SD Card I2C EEPROM Cyclone III FPGA Nios II Processor System DDR SDRAM CFI Flash SSRAM Buttons LEDs LCD Multimedia Daughtercard Cyclone III FPGA Starter Board H S M C C o n n e c t o r Bus Controller MAX II CPLD 24 Bit Audio Codec 10 bit VGA Video DAC Video Decoder PS 2 RS 232 Ports Touch Panel Module 10 100 Ethernet PHY SD Card I2C EEPROM Cy...

Page 26: ...ange of functionality on the daughter card over a limited number of pins on the HSMC connector see the LCD Multimedia Daughtercard Reference Manual for details Within the FPGA is the Nios II Video Processor System It is a pre generated Nios II processor based hardware system that can be used as a starting point for embedded application development The components in this embedded microprocessor sys...

Page 27: ...int for your embedded system development IP licenses required to ship design Nios II IP evaluation license with Nios II EDS shipping license from Altera DDR SDRAM memory controller core shipping license from Altera comes free with Quartus II Subscription edition as part of Altera IP Base Suite 1 For more information on how to obtain evaluation or shipping licenses for the above refer to Licensing ...

Page 28: ...trol in system update using SD Card remote system update using Ethernet IP licenses required to ship design SD MMC SPI Core IP with FAT file system from El Camino Triple Speed Ethernet MAC Core license from Altera Nios II IP evaluation license with Nios II EDS shipping license from Altera DDR SDRAM memory controller core shipping license from Altera comes free with Quartus II Subscription edition ...

Page 29: ... parallel flash The Nios II processor writes reset address of the hardware system stored in flash for reconfiguration LED PIO Output only control block for LED1 LED4 Pushbutton PIO Input only control block for the on board pushbuttons PIO for ID EEPROM I2C Used to communicate with the EEPROM ID chip which stores information about the board including the touch panel calibration data and Ethernet MA...

Page 30: ...nals to the LCD Touch Panel It provides high bandwidth memory access that allows for flicker free display on the color LCD A more detailed description of the data flow for the video pipeline can be found in Appendix A The video pipeline is comprised of PIO for LCD I2C Controller The I2C pins are used to configure the LCD panel for brightness and set the gamma correction curves SPI Touch Panel Cont...

Page 31: ...tions which come with the Nios II Embedded Evaluation Kit Cyclone III Edition more are available from Altera or through third party vendors 1 You can find several ready to run SD Card demonstrations in your SD Card as well as in the install dir factory_recovery sdcard_contents altera_eek_applications folder 1 Even more ready to run SD Card demonstrations and designs examples are available form the...

Page 32: ... selection 1 If there are more than five applications on the SD Card you can scroll through the list by touching the scroll up and scroll down buttons on the right hand side of the screen 4 View Information about an application To get more information about a particular application highlight the application by touching it then touching the button labeled Show Info 1 If there is additional informat...

Page 33: ... or manufacturing facility or even a customer site Having remote reconfiguration capability in your FPGA allows you to update your system with a new FPGA image so long as there is a persistent Ethernet connection The way this works is that when your kit is connected to a network it serves up a web page The contents of this web page are stored in the SD Card in a folder entitled webserver_html From...

Page 34: ...m SD Card content directories cannot be used for remote system update as the web reconfiguration interface expects to see a hardware image at 0xe00000 upon reset Operating Instructions 1 Apply power to the board by plugging in the power cable and pressing switch SW1 1 The application selector will appear on the LCD Screen On the bottom right you will see a button that should say Not Connected You ...

Page 35: ...eb page you will see a CFI Flash Upload section Click Browse button and browse to the hardware Flash image on your PC and click Open 1 Browse to the altera version kits cycloneIII_3c25_niosII examples application_selector remote_system_update folder choose an application e g mandelbrot and click on C2H_Mandelbrot_hw flash 8 On the web page click Upload 1 Please wait while the hardware Flash image ...

Page 36: ...d from the Flash device at offset 0x0 Create the software Executable link format file ELF in the standard fashion On your host PC launch a Nios II Command Shell from Start Programs Altera Nios II version EDS Nios II Command Shell From the command shell navigate to where your SOF file is located and create your hardware Flash image using the following command sof2flash activeparallel input your SOF...

Page 37: ...Evaluation Kit The Nios II Embedded Evaluation Kit also contains more applications provided from third party vendors to showcase available graphics libraries and middleware that have been ported to the Nios II processor but these designs are shipped in binary format as ready to run demonstrations Full designs for the ready to run demonstrations may be obtained by directly contacting the provider o...

Page 38: ...DRAM A Scatter Gather DMA is used to transfer pixel data from the video buffer to the video pipeline 1 You can customize the picture viewer application s image selection by adding your own images in to the folder on the SD Card entitled images Operation The Picture Viewer application displays a new picture on the LCD screen after a settable delay 1 2 3 4 5 10 15 20 seconds If decoding the image ta...

Page 39: ... Picture Viewer Application Figure 5 1 Application Selector Menu 2 Select the Pic Viewer option by touching it in the application selector menu 3 Touch the Load button located on the bottom left corner of the Touch Screen to load the Pic Viewer application You will see the progress bar on the screen See Figure 5 2 ...

Page 40: ...Pic Viewer application you will see the a slide show of pictures stored on the SD card Figures 5 4 shows the first image stored on the SD card The miniature view on the bottom right corner shows the next image of the slide show Figure 5 3 Running the Picture Viewer Application Displaying First Image 5 The next image will be displayed after the delay period See Figure 5 4 ...

Page 41: ...ouch the Forward button located at the right center of the touch panel To display the previous image touch the Reverse button located at the left center of the touch panel To play or stop the slide touch the Play Stop button On the top center of touch panel you will see the Delay period in Sec You can increase or decrease the delay period by touching the Plus or Minus buttons respectively The maxi...

Page 42: ...lation of Mandelbrot algorithm IP licenses required to ship design Nios II IP from Altera Ordering Code IP NIOS DDR SDRAM memory controller core from Altera Available free with Quartus II Subscription as part of Altera IP Base Suite Software and middleware licenses required to ship design None Software tools required to ship your hardware accelerators Nios II C2H Compiler Ordering Code IPT C2H NIO...

Page 43: ...are acceleration The Nios II C to Hardware C2H Acceleration Compiler takes standard ANSI C code in this case the Mandelbrot algorithm and automatically generates hardware accelerators In the hardware accelerated version of the design the Nios II processor handles common video functions such as the rendering the image panning zooming etc The hardware accelerator concentrates on generating the pixel...

Page 44: ... choosing it in the application selector menu via the LCD touchscreen 3 Touch the button marked Load The LCD Touch panel display begins loading the Mandelbrot C2H application as shown in Figure 5 5 Figure 5 5 Loading the Mandelbrot Application 4 After complete loading of application you will see a welcome screen as shown in Figure 5 6 ...

Page 45: ... Mandelbrot Application Figure 5 6 Welcome Screen of Mandelbrot Application 5 When you tap the touchscreen the hardware accelerated version of the Mandelbrot application will begin running changing co ordinates and zooming in and out of the complex space See Figure 5 7 Figure 5 7 Running the Mandelbrot Application ...

Page 46: ...utton See Figure 5 8 1 It is important to note that software rendering can be very slow so you may have to wait a long time for a single frame to be displayed Figure 5 8 Mandelbrot Application Menu 8 To change the color palette used in the final image simply press the Color button followed by the Continue button See Figure 5 8 1 While the menu is being displayed all rendering will be paused as wel...

Page 47: ...forms panning and zooming on the complex plane which gives a video like effect Every time a new frame is rendered a new set of coordinates must be calculated These coordinates contain a center point zoom factor and maximum number of iterations Knowing the center point and zoom factor the top left point of the screen is then determine and passed to the Mandelbrot algorithm The maximum number of ite...

Page 48: ...or the C2H accelerated version is to offload this algorithm to pipelined and parallel hardware Each Mandelbrot engine contains dedicated multiply addition and subtraction logic to perform multiple operations in parallel Each Mandelbrot accelerator operates on a quarter of the frame and is only called once per frame The workload is distributed on a pixel basis so each accelerator handles every four...

Page 49: ...licenses required to ship design NicheStack TCP IP Network Stack Nios II Edition free evaluation license available with Nios II EDS shipping license from Altera Ordering Code IPSW TCP IP NIOS MicroC OS II real time operating system free evaluation license available with Nios II EDS shipping license to be purchased from Micrium 1 For more information on how to obtain evaluation or shipping licenses...

Page 50: ...ble the application will attempt to obtain an IP address from a DHCP server Otherwise a static IP address defined in web_server h will be assigned after a time out The server can process basic requests to serve HTML JPEG and GIF files from the Altera FAT file system on an SD card The embedded web server is in no way a complete implementation of a full featured HTTP server This example uses the soc...

Page 51: ...nc generator which you could think of as an LCD display PHY 1 If you actually look at the design there are several other Avalon Streaming components in this flow These have been omitted from this discussion for clarity because they are not operational They are just timing adapters which allow the operational pieces to fit together properly Starting from the end of the chain The sync generator just...

Page 52: ... support a 5 6 5 pixel format Get the full LCD controller Application Note For more information about the video pipeline and LCD controller refer to AN527 Implementing an LCD Controller Creating a new 5 6 5 Pixel Format component The Nios II Standard System is designed to use a 32 bit 0 R G B data format Suppose you wanted to change the entire display subsystem to work with 16 bit 5 6 5 pixels ins...

Page 53: ...ut Interface Parameters Data Symbols Per Beat from 4 to 2 This changes its width adaptation from 64 32 to 64 16 Rename it to lcd_64_to_16_bits_dfa 6 Regenerate your system Your software application is now responsible for filling the frame buffer with aligned 16 bit 5 6 5 pixel data and the firmware which controls the DMA must be modified to understand the different memory buffer size implications ...

Page 54: ...Altera Corporation A 4 July 2010 Nios II Embedded Evaluation Kit Cyclone III Edition ...

Page 55: ...the example and must be derived from a SOF file as described in the section of this document titled Creating Your Own Loadable Applications This file can be named anything supported by the FAT 16 file system the only restriction being that the name must end with _hw flash The optional info txt file contains additional information about the application In the application selector utility touching t...

Page 56: ...ion Selector hardware image is permanently stored in flash at offset 0x20000 Hardware images for the applications being loaded get written to flash at load time to an offset between 0x580000 and 0xD00000 depending on caching Hardware image caching is described in more detail in the section titled Hardware Image Caching Software Images CFI flash is used to store the software images of both the Appl...

Page 57: ...Offset 0x180000 is where the application software image is located after being loaded by the Application Selector so when the FPGA is reconfigured the Nios II CPU executes this boot code which branches to the boot copier of the actual application software image which then copies the application to program memory then runs the application 1 The Application Selector relies on a feature of the Cyclon...

Page 58: ...rently stored in CFI flash to see if any of them match the hardware image being requested If one of the images cached in CFI flash does match the Application Selector reconfigures from the offset of that cached hardware image instead of copying the image from SD Card to flash This significantly reduces the load time Caching the hardware images requires the application selector to be able to quickl...

Page 59: ...ble or ZSFA This scheme avoids erasing entire flash sectors when only a few words need to be written to the flash Using ZSFA a word in the flash which is 0x0 is considered spent and cannot be used to store data A word which is 0xFFFFFFFF is available since it is in its erased state Every other value is considered a valid entry in the catalog The way ZSFA works is that whenever a catalog entry need...

Page 60: ... have your working SOF and ELF file pair perform the following steps to convert them to a loadable application selector compatible application 1 Copy both the SOF and ELF files into a common directory of your choosing This directory is where you will convert the files 2 Copy the script examples application_selector application_utilities flash_file_conversion_script to the directory where you copie...

Page 61: ...ard reader copy the directory onto an SD Card into a directory named Altera_EEK_Applications The directory structure on the SD Card should look like this Altera_EEK_Applications Name of Application elf name _sw flash sof_name _hw flash info txt 10 Place the SD Card in the Nios II Embedded Evaluation Kit Cyclone III Edition board and switch on the power The Application Selector will start up and yo...

Page 62: ...ples bsp hal_application_selector 3 Run the command create_this_bsp Build the project The next step is to build the Application Selector project To build the project perform these steps 1 In the Nios II Command Shell change to the directory Install Directory examples application_selector software_examples app application_selector 2 Run the command make all 1 For more information about BSPs and the...

Page 63: ...mpatible with the Application Selector s default flash layout you can modify the way some things are mapped in flash fairly easily General Guidelines If you choose to modify the flash map take great care in ensuring that you leave enough space in each block for the data you intend to store there Otherwise you may overlap sections and the Application Selector utility may overwrite important data an...

Page 64: ...ater than or equal to 0xC0000 The Application Selector will cache as many images in this section as it is able to fit For instance the default section is 0x780000 bytes in size 60 flash sectors so it is able to cache up to 10 loadable application hardware images Application Selector Software Image The default location of the Application Selector software image is flash offset 0x100000 This is nece...

Page 65: ...ur application software images 3 In a text editor open the file install Directory examples application_selector software_examples app application_selector src app_selector h 4 Edit the line define AS_SW_IMAGE_OFFSET 0x240000 to reflect the flash offset where you would like to put the loadable application software images Ensure that there is enough space allocated at that offset to hold your applic...

Page 66: ...ation_selector software_examples app application_selector src app_selector h 2 Edit the lines define AS_FLASH_IMAGE_CATALOG_OFFSET 0x8000 define AS_FLASH_IMAGE_CATALOG_SIZE 0x8000 to reflect the flash offset where you would like to put flash catalog 1 You will need to rebuild the boot code for these changes to take effect ...

Page 67: ... Connect your board to the PC by connecting a USB cable from USB connector J3 on your board to a USB port on your PC 3 Tools menu in Quartus II software launch the Quartus II Programmer and click Auto Detect The EP3C25F324 device should be detected 1 If the device is not detected make sure your hardware is setup for USB Blaster using the Hardware Setup button 4 Double click on the File field and b...

Page 68: ...h includes your modifications Keep in mind that any modifications you make to the application selector or boot code may make them incompatible with existing applications Each portion of the factory recovery image is described below with instructions on how to create it and program it to flash The last section here titled Combining factory recovery image files includes instructions for creating a s...

Page 69: ...ad bytes 0x8000 0x8000 Application Selector Hardware Image The application selector hardware image section contains the FPGA hardware image for the application selector utility This section is located at flash offset 0x20000 The FPGA gets configured with this image upon power up and after a board reset The file you will need to create this portion of the factory recovery image is named cycloneIII_...

Page 70: ... flash Combining factory recovery image files Once you ve created flash or srec files for all the sections of the factory recovery image you can combine them all into one file using the cat command cat app_selector_boot_code srec catalog flash appsel_hw flash ext_flash flash temp_restore flash However you are still not done Some of the individual files we combined contained non data records in the...

Page 71: ...any OpenCore Plus IP cores in your system Contact your local sales offices to purchase the license http www altera com corporate contact con index html What are Ready to Run Demonstrations Ready to run demonstrations are binary flash files of processor systems that can be programmed to flash or selected and loaded from the LCD touch panel Ready to run demonstrations provide a quick and easy way to...

Page 72: ...onstration application Where can I get more ready to run demonstrations To get more information about the ready to run demonstrations 1 For usage instructions use the LCD Touch Screen to highlight the demonstration and press the Info button 2 In addition to the prepackaged ready to run SD Card demonstration applications which come with the Nios II Embedded Evaluation Kit Cyclone III Edition more a...

Page 73: ... generate the system You should now be able to rebuild the hardware system without error When your hardware and software image is ready you can add your design to be loadable by the application selector by following the steps listed in the FAQ How do I add my own design so the Application Selector can find and run it Where can I get the SD Card Controller IP License If your design requires access ...

Page 74: ... runs on that hardware a Nios II ELF file 3 An SD Card reader f For a step by step instructions refer to section in Appendix B of this document entitled Creating Your Own Loadable Applications Where do I go to get more designs for the Nios II Embedded Evaluation Kit For more information about the latest demonstrations available for download to your Nios II Embedded Evaluation kit refer to the Nios...

Page 75: ...grammer configure the FPGA with the SOF file altera version kits cycloneIII_3c25_niosII examples application_selector cycloneIII_embedded_ evaluation_kit_applicatoin_selector sof 2 Open a Nios II Command Shell and change to the directory altera version kits cycloneIII_3c25_niosII factory_recovery flash_cont ents 3 In the Nios II Command Shell program the factory image into flash with the command n...

Page 76: ...Altera Corporation D 6 July 2010 Nios II Embedded Evaluation Kit Cyclone III Edition ...

Page 77: ...Installing the Quartus II Web Edition Software on page 1 9 Updated Further Information on page i ii Updated Table B 1 on page B 4 Updated Application Hardware Images on page B 10 and Application Software Image on page B 10 Updated Copyright information All August 2008 1 1 Second publication All November 2007 1 0 First publication Information Type Contact Note 1 Technical support www altera com mys...

Page 78: ...nsions and software utility names are shown in bold type Examples fMAX qdesigns directory d drive chiptrip gdf file Italic Type with Initial Capital Letters Document titles are shown in italic type with initial capital letters Example AN 75 High Speed Board Design Italic type Internal timing parameters and variables are shown in italic type Examples tPIA n 1 Variable names are enclosed in angle br...

Page 79: ...of the items is not important v The checkmark indicates a procedure that consists of one step only 1 The hand points to information that requires special attention c A caution calls attention to a condition or possible situation that can damage or destroy the product or the user s work w A warning calls attention to a condition or possible situation that can cause injury to the user r The angled a...

Page 80: ...Altera Corporation Info iv Additional Information Typographic Conventions ...

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