Remote control
R&S
®
ZND
616
User Manual 1173.9557.02 ─ 61
Refer to the
Chapter 9, "Error messages and troubleshooting"
on page 1177 for a
detailed description of hardware errors including possible remedies.
The bits in the
STATus:QUEStionable:INTegrity
register are defined as follows.
Bit No.
Meaning
2
HARDware register summary
This bit is set if a bit is set in the STATus:QUEStionable:INTegrity:HARDware register and
the associated ENABle bit is set to 1.
STATus:QUEStionable:INTegrity:HARDware
The
STATus:QUEStionable:INTegrity:HARDware
register can be queried using
the commands
STATus:QUEStionable:INTegrity:HARDware:CONDition?
or
STATus:QUEStionable:INTegrity:HARDware[:EVENt]?
The bits in the
STATus:QUEStionable:INTegrity:HARDware
register are defined
as follows.
Bit No.
Meaning
0
Not used
1
Reference frequency lock failure
If an external reference signal is used, the local oscillator is phase locked to a reference
signal. This bit is set if this phase locked loop (PLL) fails.
For external reference: check frequency and level of the supplied reference signal.
2
Output power unleveled
This bit is set if the level control at one of the ports is unsettled or unstable, possibly due to
an external disturbing signal.
Change generator level at the port; check external components.
3
Receiver overload protection tripped
This bit is set if the analyzer detects an excessive input level at one of the ports. If this
condition persists, all internal sources are switched off.
Reduce RF input level at the port. Check amplifiers in the external test setup, then switch
on the internal source using
OUTPut ON
.
4
Problem concerning external switch matrix
This bit is set if an external matrix has been configured but cannot be controlled or pro-
vides error messages.
Check whether the matrix is properly connected and switched on. Check for proper wiring
of the interfaces, in particular on input and output. If the LAN or USB interface is config-
ured, disconnect the Direct CTRL plug. Exclude address conflicts when using several
external switch matrices or other external devices.
6
Internal communication error
This bit is set if an internal error caused the analyzer to perform an automatic hardware
reset. The current measurement results are possibly invalid.
The bit is automatically cleared at the beginning of the next sweep, no action is required.
Status reporting system
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