ZYNQ Ultr FPGA Board AXU5EV-P User Manual
12 / 66
www.alinx.com
Part 2: ACU5EV core board
Part 2.1: ACU5EV core board Introduction
ACU5EV (core board model, the same below) FPGA core board, ZYNQ
chip is based on XCZU5EV-2SFVC784I of XILINX company Zynq Ult
MPSoCs EV Family.
This core board uses 5 Micron DDR4 chips MT40A512M16GE, of which 4
DDR4 chips are mounted on the PS side to form a 64-bit data bus bandwidth
and 4GB capacity. One DDR4 chip is mounted on the PL end, which is a 16-bit
data bus width and a capacity of 1GB. The highest operating speed of DDR4
SDRAM on the PS side can reach 1200MHz (data rate 2400Mbps), and the
highest operating speed of DDR4 SDRAM on the PL side can reach 1066MHz
(data rate 2132Mbps). In addition, a 256MBit QSPI FLASH and an 8GB eMMC
FLASH chip are also integrated on the core board to start storage configuration
and system files.
In order to connect with the carrier board, the four board-to-board
connectors of this core board expand the PS side USB2.0 interface, Gigabit
Ethernet interface, SD card interface and other remaining MIO ports; also
expand 4 pairs of PS MGT high-speed transceiver interface; and almost all IO
ports on the PL side (HP I/O: 96, HD I/O: 84). The wiring between the
XCZU5EV chip and the interface has been processed with equal length and
differential, and the core board size is only 3.15*2.36 (inch), which is very
suitable for secondary development.