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KINTEX-7 FPGA Development Board AV7K325 User Manual
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PCIE_RX5_P
BANK115_RX2_P
W4
PCIE Channel 5 Data Receive Positive
PCIE_RX5_N
BANK115_RX2_N
W3
PCIE Channel 5 Data Receive Negative
PCIE_RX6_P
BANK115_RX1_P
Y6
PCIE Channel 6 Data Receive Positive
PCIE_RX6_N
BANK115_RX1_N
Y5
PCIE Channel 6 Data Receive Negative
PCIE_RX7_P
BANK115_RX0_P
AA4
PCIE Channel 7 Data Receive Positive
PCIE_RX7_N
BANK115_RX0_N
AA3
PCIE Channel 7 Data Receive Negative
PCIE_TX0_P
BANK116_TX3_P
L4
PCIE Channel 0 Data Receive Positive
PCIE_TX0_N
BANK116_TX3_N
L3
PCIE Channel 0 Data Receive Negative
PCIE_TX1_P
BANK116_TX2_P
M2
PCIE Channel 1 Data Receive Positive
PCIE_TX1_N
BANK116_TX2_N
M1
PCIE Channel 1 Data Receive Negative
PCIE_TX2_P
BANK116_TX1_P
N4
PCIE Channel 2 Data Receive Positive
PCIE_TX2_N
BANK116_TX1_N
N3
PCIE Channel 2 Data Receive Negative
PCIE_TX3_P
BANK116_TX0_P
P2
PCIE Channel 3 Data Receive Positive
PCIE_TX3_N
BANK116_TX0_N
P1
PCIE Channel 3 Data Receive Negative
PCIE_TX4_P
BANK115_TX3_P
T2
PCIE Channel 4 Data Receive Positive
PCIE_TX4_N
BANK115_TX3_N
T1
PCIE Channel 4 Data Receive Negative
PCIE_TX5_P
BANK115_TX2_P
U4
PCIE Channel 5 Data Receive Positive
PCIE_TX5_N
BANK115_TX2_N
U3
PCIE Channel 5 Data Receive Negative
PCIE_TX6_P
BANK115_TX1_P
V2
PCIE Channel 6 Data Receive Positive
PCIE_TX6_N
BANK115_TX1_N
V1
PCIE Channel 6 Data Receive Negative
PCIE_TX7_P
BANK115_TX0_P
Y2
PCIE Channel 7 Data Receive Positive
PCIE_TX7_N
BANK115_TX0_N
Y1
PCIE Channel 7 Data Receive Negative
PCIE_CLK_P
BANK115_CLK0_P
R8
PCIE channel reference clock Positive
PCIE_CLK_N
BANK115_CLK0_N
R7
PCIE channel reference clock Negative
PCIE_PERST
B12_L16_N
AF25
The reset signal of the PCIE board
Part 3.4: HDMI Video Output Interface
There are 2 HDMI output ports on the carrier board. The HMDI chip is the
SiI9136 HDMI
encoding chip from
LATTICE
, which supports up to
4K@30Hz
output and
3D
output. Among them, the video digital interface, audio digital
interface and I2C configuration interface of SiI9136 are connected to the IO of