Alcatel MainStreet 2902, Manual, Page: 226 / 344

22 — HCM rate adaption
22-2 2902 MainStreet Technical Practices
90-2906-01 May 2002
22.1 Rate adaption overview
Rate adaption techniques allow subrate data devices to use a 64 kb/s channel by
formatting the data to conform to the primary rate framing structure. Using rate
adaption, several subrate data devices can be multiplexed onto one primary rate
channel.
Setting rate adaption parameters defines data transport information, such as
bandwidth allocation and data position within the channel. Data from each circuit
must be positioned so that it does not overlap data from other circuits.
22.2 HCM rate adaption overview
HCM rate adaption is an Alcatel proprietary rate adaption scheme. It allows users to
establish data channels using a wider variety of interface speeds than is possible with
other rate adaption techniques.
HCM rate adaption divides a 64 kb/s channel into 80 elements; each element is
transmitted 800 times per second. Each element represents 1 bit and, therefore,
800 b/s of bandwidth.
After HCM rate adaption is selected, you can set:
•
transport bandwidth
•
transport position
•
signaling
•
interface speed
•
data position
Figure 22-1 shows an HCM frame displayed in an NMTI screen. The HCM frame is
a 10-row by 8-column matrix. The rows are named F0 to F9 and columns are named
B7 to B0. An element is identified by its row and column, for example, F3-B2.
The F represents an element reserved for the framing bit, which flags the start of the
HCM frame. A framing bit is needed because the HCM frame pattern is independent
of the primary rate framing pattern. The position of the F bit can be adjusted (see
section 22.4).
The S represents an element reserved for signaling when end-to-end signaling is
required, which includes the clock adjustment if clocking is configured as
independent. A signaling bit position is reserved only if signaling is turned on for the
circuit (see section 22.5).
The D represents data elements. The number of Ds is determined by the interface
speed (see section 22.6). The position of the first D bit can be adjusted (see
section 22.7).
Note 1 —
A module position must be configured before its circuits
can be configured with rate adaption parameters.
Note 2 —
Circuits configured as master or slave in a multidrop
configuration are an exception in that they must be positioned to
overlap. However, multidrop circuits should not overlap circuits that
are not part of the multidrop data bridge.