AKM AKD7736A-A Manual Download Page 1

   [AKD7736A-A] 

<KM113102>  

2012/12 

 

- 1 - 

 

 

GENERAL DESCRIPTION 

The AKD7736A-A is an evaluation board for the AK7736A that is an audio processor with a 2ch SRC. This 
board consists of a main board and a sub board. It is possible to control by a PC via USB port. This board 
has digital interfaces enabling to interface with digital audio systems via optical connector, ADC-Port, 
DAC-Port and EXT-Port. 
 

 

Ordering guide 

 

AKD7736A-A  ---   AK7736A Evaluation board 

                              The AK77XX-HF-CONTROL-BOX, Control software and USB cable are 

included in this package. 

 
 

FUNCTION 

 

†

 

Read/Write access to PRAM, CRAM, OFFRAM and registers of the AK7736A 

†

 

Compatible with 2 types of digital audio interface 

- Optical input (x1) / Optical output (x1)  
- 10-pin header (x2) and 44-pin header (x1) for interface with external data source 

†

 

USB port for board control 

 

 

FPGA 

(XC95288XL)

ADC 

DAC 

10 Pin Header

Regulator

 GND

+3.3V

1.8V

CONTROL 

Opt In 

Opt Out 

AK4118A 

EXT 

44 Pin Header 

10 Pin Header 

AK7736A

 

 

Figure 1. AKD7736A-A Block Diagram

AK7736A

 

Evaluation

 

Board

 

Rev.0

AKD7736A-A

Summary of Contents for AKD7736A-A

Page 1: ...AKD7736A A AK7736A Evaluation board The AK77XX HF CONTROL BOX Control software and USB cable are included in this package FUNCTION Read Write access to PRAM CRAM OFFRAM and registers of the AK7736A Co...

Page 2: ...AKD7736A A KM113102 2012 12 2 Evaluation Board Diagram Board Diagram Figure 2 AKD7736A A Board Diagram 1 2 3 5 6 4 7 8 9 13 12 14 10 11 15 16 17 18 19...

Page 3: ...e available by setting the control software 5 DAC port JP3 10 pin header 10 pin header for external interface Interfacing to external digital audio devices Pin I O Function Pin I O Function 1 O MCLK 2...

Page 4: ...U1 AK4118A Digital Audio Transceiver 14 7 DIP Switches S1 DIP Switch for pin settings L H of the AK4118A Refer to the AK4118A Setting for details No Name AK4118A 1 CM0 CM0 32 pin 2 CM1 CM1 33 pin 3 O...

Page 5: ...cable via the AKD77XX HF CONTROL BOX called CONTROL BOX hereafter which is included in this package It is required to push down the reset button yellow of the CONTROL BOX to initialize the USB control...

Page 6: ...ting of the AK4118A Main Board Jumper Switch Setting Default SW1 AK4118A Clock TX CLK S1 AK4118A Setting 1 7 LHLLLHH Table 3 Configuration of the AK4118A switch in Master Mode 2 Digital to Digital Eva...

Page 7: ...arking that says CONTROL on the main board of the AKD7736A A Figure 1 Direction of the 10 pin Flat Cable The interface setting is made by jumper pins of the CONTROL BOX and the I2CSEL pin of the AK773...

Page 8: ...TVDD 3 3V Refer to 11 in Table 1 JP6 VDD Short AK7736A VDD JP7 P DVDD Short Peripheral DVDD JP8 DI1 Xilinx Refer to 2 in Table 1 JP9 DI2A Xilinx JP10 DI2B Xilinx JP11 DI2C Xilinx JP12 XTI Xilinx JP13...

Page 9: ...DAUX Table 8 AK4118A CM 1 0 DIF2 DIF1 DIF0 DAUX SDTO LRCK BICK 0 0 0 24bit Left justified 16bit Right justified H L O 64fs O 0 0 1 24bit Left justified 18bit Right justified H L O 64fs O 0 1 0 24bit L...

Page 10: ...External DIR PORT1 Figure 3 Digital Input Circuit For digital input SPDIF IN optical connector PORT1 is available Digital Output Circuit External DIT PORT2 Figure 4 Digital Output Circuit For digital...

Page 11: ...nitialize the USB chip 3 Insert the CD ROM labeled AKD7736A A Evaluation Kit into the CD ROM drive 4 Access the CD ROM drive and double click the icon of AK7736A exe according to the interface setting...

Page 12: ...wn in the Control I F box as Serial SPI or I2C JX JX Code Setting Board Init Reset the evaluation board and the register values set by the control software are written again PDN Pin Power Down The AK7...

Page 13: ...oads the program to the AK7736A Assemble Write Compiles a source file and then downloads the file to the AK7736A PRAM read Reads out the PRAM data to a temporary file CRAM read Reads out the CRAM data...

Page 14: ...G4 are used to set registers TEST and Reserved items are prohibited to change As the checkbox is clicked the data is written to the register Release the reset state after setting CKM mode since SRESET...

Page 15: ...AKD7736A A KM113102 2012 12 15 4 FPGA Set up Figure 8 FPGA1 Dialogue The FPGA1 FPGA2 dialogues are used to control the data path of the AK7736A FPGA Setting Table The default setting is shown in bold...

Page 16: ...ta source to the LRCLKI2 JX2 pin of the AK7736A 00 AK4118A LRCK 01 ADC LRCK 10 Low 11 High D 26 25 SEL15 BICK3 LRCK3 Input clock to the BITCLKI3 LRCLKI3 pin of the AK7736A 00 AK4118A BICK LRCK 01 ADC...

Page 17: ...1 AK7736A BITCLKO LRCLKO input D 7 5 SEL4 TX DAT Input data source to the DAUX pin of the AK4118A 000 AK7736A SDOUT1 001 AK7736A SDOUT2A 010 AK7736A SDOUT2B 011 AK7736A SDOUT3 100 AK7736A SDOUT4 101 L...

Page 18: ...nuous Data Write This command can be used during CRAM run Command is byte assigned the data is word assigned WS command address data WS 0x81 0x00 0x22 0x40 0x00 0x40 0x00 Continuous Data Write This co...

Page 19: ...her intended nor authorized for use as critical componentsNote1 in any safety life support or other hazard related device or systemNote2 and AKM assumes no responsibility for such use except for the u...

Page 20: ...O X BITCLKO X LRCLKO X RDY X SDOUT1 X SDOUT3 X SDOUT4 X XTI X LRCLKI3 X SDIN3 X BITCLKI3 X SDIN2A X SDIN2C X PDN X I2CSEL X CTRL SCLK SCL X CTRL SO X CTRL HOST X CTRL RESET X CTRL SI X CTRL RQN X CTRL...

Page 21: ...ev Date Sheet of AK4118A 0 AKD7736A A MAIN A3 2 9 Friday December 07 2012 C9 0 1uF C8 0 1uF R4 51 C7 22pF C4 0 1uF TP1 BLACK 1 PORT1 PLR135_T9 OUT 1 VCC 3 GND 2 L2 10uH 500mA R12 10k C13 10uF L1 10uH...

Page 22: ...N CAD1 DSP BITCLKI2 JX1 DSP LRCLKI2 JX2 DSP SO DSP STO VDD TVDD VDD VDD Title Size Document Number Rev Date Sheet of AK7736A 0 AKD7736A A MAIN A3 3 9 Friday December 07 2012 Title Size Document Number...

Page 23: ...v Date Sheet of CONTROL 0 AKD7736A A MAIN A4 4 9 Friday December 07 2012 Title Size Document Number Rev Date Sheet of CONTROL 0 AKD7736A A MAIN A4 4 9 Friday December 07 2012 Title Size Document Numbe...

Page 24: ...EXT SDOUT3 EXT SDOUT4 ADC BICK ADC LRCK ADC MCLK ADC SDTO1 ADC SDTO2 DAC SDTI2 DAC SDTI1 EXT EXTCLK Title Size Document Number Rev Date Sheet of EXT 0 AKD7736A A MAIN A4 5 9 Friday December 07 2012 Ti...

Page 25: ...6 9 Friday December 07 2012 Title Size Document Number Rev Date Sheet of LEVEL SHIFT 0 AKD7736A A MAIN A4 6 9 Friday December 07 2012 Title Size Document Number Rev Date Sheet of LEVEL SHIFT 0 AKD773...

Page 26: ...P TVDD Title Size Document Number Rev Date Sheet of POWER 0 AKD7736A A MAIN A3 7 9 Friday December 07 2012 Title Size Document Number Rev Date Sheet of POWER 0 AKD7736A A MAIN A3 7 9 Friday December...

Page 27: ...EXT BITCLKI2 JX1 SEL EXT LRCLKI2 JX2 SEL EXT BITCLKI3 SEL EXT LRCLKI3 SEL EXT BITCLK1 SEL EXT LRCLK1 Title Size Document Number Rev Date Sheet of SELECTOR 0 AKD7736A A MAIN A3 8 9 Friday December 07...

Page 28: ...10 14 IO2 12 15 IO2 14 16 IO2 15 17 GND 18 IO2 17 19 IO1 5 20 IO1 6 21 IO1 8 22 IO1 10 23 IO1 12 24 IO1 14 25 IO1 15 26 IO1 17 27 IO3 2 28 GND 29 GCK1 30 IO3 12 31 GCK2 32 IO3 15 33 IO5 2 34 IO5 5 35...

Page 29: ...0 31 32 33 34 35 36 TP23 SDIN2C C14 22pF DIP TP17 BITCLKO R10 51 TP1 VSS TP25 JX0 TP29 SDOUT2A R3 51 R16 0 DIP TP41 SDIN2B C11 0 1uF TP34 SDOUT2B CN3 48pin_2 13 14 15 16 17 18 19 20 21 22 23 24 TP16 V...

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