Jitter Generation Block Diagram
To support all present test standards, the pattern generator of the Serial
BERT has the following hardware architecture:
The clock can be generated from the internal oscillator or an external
source.
The instrument has internal sources for spread spectrum clocking
(SSC), sinusoidal jitter (SJ), periodic jitter (PJ), bounded uncorrelated
jitter (BUJ), and random jitter (RJ). In addition, an external jitter signal
can be applied at the Delay Ctrl Input.
Note that all these sources can be individually switched on or off.
This is a special modulator that modulates the generated clock with a
low-frequency signal. The resulting jitter superimposes all other jitter
components.
Two sources are provided for modulating the clock: Spread spectrum
(triangular) or sinusoidal. Only one of them can be used at a time.
When sinusoidal modulation is chosen, the Clock Output and Trigger
Output ports can be connected to the unmodulated or the modulated
clock. If SSC is enabled, the Clock Output and Trigger Output ports
provide the spread spectrum clock.
7
Jitter Tolerance Tests
322
Agilent J-BERT N4903 High-Performance Serial BERT
Clock generator
Jitter sources
Clock modulator
Summary of Contents for J-BERT N4903
Page 1: ...S Agilent J BERT N4903 High Performance Serial BERT User Guide s Agilent Technologies...
Page 68: ...2 Setting up Patterns 68 Agilent J BERT N4903 High Performance Serial BERT...
Page 158: ...4 Setting up the Error Detector 158 Agilent J BERT N4903 High Performance Serial BERT...
Page 314: ...6 Evaluating Results 314 Agilent J BERT N4903 High Performance Serial BERT...
Page 374: ...7 Jitter Tolerance Tests 374 Agilent J BERT N4903 High Performance Serial BERT...
Page 394: ...8 Solving Problems 394 Agilent J BERT N4903 High Performance Serial BERT...
Page 434: ...Index 434 Agilent J BERT N4903 High Performance Serial BERT...
