4- 16
Status Reporting
Mask Test Event Enable Register
Mask Test Event Enable Register
For any of the Mask Test Event Register bits to generate a summary bit, you
must first enable the bit. Use the MTEE (Mask Test Event Enable) command
to set the corresponding bit in the Mask Test Event Enable Register. Set bits
are read with the MTEE? query.
Example
Suppose your application requires an interrupt whenever a Mask Test Fail
occurs in the mask test register. You can enable this bit to generate the summary
bit by sending:
OUTPUT 707;”MTEE 2”
Whenever an error occurs, the oscilloscope sets the MASK bit in the Operation
Status Register. Because the bits in the Operation Status Enable Register are
all enabled, a summary bit is generated to set bit 7 (OPER) in the Status Byte
Register.
If bit 7 (OPER) in the Status Byte Register is enabled (via the *SRE command),
a service request interrupt (SRQ) is sent to the external computer.
Disabled Mask Test Event Register Bits Respond, but Do Not Generate a Summary
Bit
Mask Test Event Register bits that are not enabled still respond to their
corresponding conditions (that is, they are set if the corresponding event occurs).
However, because they are not enabled, they do not generate a summary bit in the
Operation Status Register.
Summary of Contents for Infiniium 8000A
Page 1: ...Agilent Technologies Infiniium 8000A Programmer s Reference ...
Page 2: ......
Page 20: ...Contents 16 ...
Page 21: ...1 Introduction to Programming ...
Page 43: ...2 LAN and GPIB Interfaces ...
Page 53: ...3 Message Communication and System Functions ...
Page 58: ...3 6 ...
Page 59: ...4 Status Reporting ...
Page 78: ...4 20 Figure 4 3 Status Reporting Decision Chart ...
Page 79: ...5 Programming Conventions ...
Page 84: ...5 6 Programming Conventions The Command Tree Figure 5 1 Command Tree ...
Page 85: ...5 7 Programming Conventions The Command Tree Figure 5 2 Command Tree Continued ...
Page 86: ...5 8 Programming Conventions The Command Tree Figure 5 3 Command Tree Continued ...
Page 87: ...5 9 Programming Conventions The Command Tree Figure 5 4 Command Tree Continued ...
Page 88: ...5 10 Programming Conventions The Command Tree Figure 5 5 Command Tree Continued ...
Page 89: ...5 11 Programming Conventions The Command Tree Figure 5 6 Command Tree Continued ...
Page 94: ...5 16 ...
Page 95: ...6 Sample Programs ...
Page 149: ...7 Acquire Commands ...
Page 176: ...7 28 Acquire Commands SRATe AUTO ...
Page 177: ...8 Bus Commands ...
Page 187: ...9 Calibration Commands ...
Page 195: ...10 Channel Commands ...
Page 223: ...11 Common Commands ...
Page 247: ...12 Digital Commands ...
Page 254: ...12 8 ...
Page 255: ...13 Disk Commands ...
Page 300: ...13 46 Disk Commands STORe Obsolete ...
Page 301: ...14 Display Commands ...
Page 322: ...14 22 ...
Page 323: ...15 External Trigger Commands ...
Page 343: ...16 Function Commands ...
Page 382: ...16 40 ...
Page 383: ...17 Hardcopy Commands ...
Page 391: ...18 Histogram Commands ...
Page 403: ...19 InfiniiScan ISCan Commands ...
Page 421: ...20 Limit Test Commands ...
Page 429: ...21 Marker Commands ...
Page 452: ...21 24 ...
Page 453: ...22 Mask Test Commands ...
Page 499: ...23 Measure Commands ...
Page 636: ...23 138 Measure Commands VUPPer ...
Page 637: ...24 Pod Commands ...
Page 642: ...24 6 ...
Page 643: ...25 Root Level Commands ...
Page 645: ...25 3 STORe SETup STORe WAVeform TER Trigger Event Register VIEW ...
Page 674: ...25 32 ...
Page 675: ...26 Self Test Commands ...
Page 679: ...27 System Commands ...
Page 694: ...27 16 ...
Page 695: ...28 Time Base Commands ...
Page 708: ...28 14 ...
Page 709: ...29 Trigger Commands ...
Page 822: ...29 114 ...
Page 823: ...30 Waveform Commands ...
Page 893: ...31 Waveform Memory Commands ...
Page 902: ...31 10 ...
Page 903: ...32 Error Messages ...
Page 914: ...32 12 ...