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Real-Time I/Q Baseband Generator User’s and Programming Guide
Softkey Reference
ESG Family Signal Generators
C
Options UN8 and 202
Configure FCorr
Pressing this softkey accesses a menu of softkeys for configuring a
frequency correction timeslot. The following figure shows an example of
the display graphics for a frequency correction timeslot. The visual
representation of the timeslot shows each field of the frequency
correction timeslot.
In this example:
•
T: 0 (always)
indicates that both of the 3-bit tail fields are always
hexadecimal zero. The text in this field is grey, indicating that you
cannot change the contents of the tail bit fields.
•
Fixed: 000000000000000000000000000000 (always)
indicates
that the 142-bit fixed field is set to all zeroes or hexadecimal
000000000000000000000000000000000000.The text in this field is
grey, indicating that you cannot change the contents of the fixed
field.
•
G: --
guard time appears in the visual representation of the
timeslot as an 8.25-bit field. In the actual implementation, the guard
time field in timeslots 0 and 4 are 9 bits long and the remaining
timeslots contain 8 bit fields. (This implementation is documented in
the GSM format “GSM REC. 05.10 Section 5.7” as follows:
“Optionally, the BS may use a timeslot length of 157 bit periods on
timeslots with TN=0 and 4, and 156 bit periods on timeslots with
TN=1, 2, 3, 5, 6, 7, rather than 156.25 bit periods on all timeslots.”)
The text in this field is grey, indicating that you cannot change the
contents of the guard time field.
Softkey Location: Press
Mode
>
TDMA
>
GSM
>
Data Format Pattern Framed
>
Configure Timeslots
>
Timeslot Type
>
FCorr
>
Configure FCorr
Summary of Contents for ESG series
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