Chapter 17
641
W-CDMA Downlink Digital Modulation for Receiver Test
W-CDMA Frame Structures
Downlink DPCCH/DPDCH Frame Structure
Figure 17-39
DPCCH/DPDCH Frame Structure
Table 17-8
DPDCH and DPCCH Fields
Ch
an
nel
B
it
Ra
te (
Kb
ps
)
Ch
an
nel
S
ym
bol
Ra
te (
Ks
ps
)
Sp
re
ad
Fa
ctor
Bits/Frame
DPDCH Bits/Slot
DPCCH
Bits/Slot
DP
DC
H
DP
CC
H
TO
TA
L
Bi
ts
/S
lo
t
N
data1
N
data2
N
TFCI
N
TPC
N
pilot
15
7.5
512
90
150
10
0
4
0
2
4
15
7.5
512
30
120
150
10
0
2
2
2
4
30
15
256
240
60
300
20
2
14
0
2
2
a
30
15
256
210
90
300
20
2
12
2
2
2
a
30
15
256
210
90
300
20
2
12
0
2
4
a
30
15
256
180
120
300
20
2
10
2
2
4
a
30
15
256
150
150
300
20
2
8
0
2
8
a
30
15
256
120
180
300
20
2
6
2
2
8
a
Summary of Contents for E4428C
Page 22: ...Contents xxii ...
Page 224: ...200 Chapter 4 Basic Digital Operation Creating and Using Bit Files ...
Page 228: ...204 Chapter 5 AWGN Waveform Generator Configuring the AWGN Generator ...
Page 229: ...205 6 Analog Modulation ...
Page 276: ...252 Chapter 7 Digital Signal Interface Module Operating the N5102A Module in Input Mode ...
Page 286: ...262 Chapter 8 Bluetooth Signals Turning On a Bluetooth Signal ...
Page 330: ...306 Chapter 9 BERT Verifying BERT Operation ...
Page 366: ...342 Chapter 10 CDMA Digital Modulation IS 95A Modulation ...
Page 394: ...370 Chapter 12 Multitone Waveform Generator Applying Changes to an Active Multitone Signal ...
Page 468: ...444 Chapter 15 W CDMA Digital Modulation for Component Test W CDMA Frame Structures ...
Page 667: ...643 18 Troubleshooting ...
Page 700: ...Index 676 Index ...