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Agilent Technologies 16900 Series, Service Manual

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Agilent Technologies 16900 Series Service Manual Download Page 74

74

 

 

Chapter 5: Troubleshooting

To test the cables

Connect the test equipment

1

Using two 2 x 9 test connectors, connect the logic analyzer to the pulse 
generator channel outputs.

a

Connect the even-numbered channels to the pulse generator Channel 2 
OUTPUT.

b

Connect the odd-numbered channels the pulse generator Channel 2 
OUTPUT. 

2

Connect Clk1 to the pulse generator Channel 2 OUTPUT.

3

Enable the pulse generator Channel 1 and Channel 2 outputs (LEDs off).

Configure the logic analyzer to test Pod 1

1

Exit the logic analysis application (from the main menu, choose 

File

→

Exit

) 

and then restart the application. This puts the logic analysis system into its 
initial state.

2

Disable all logic analyzers other than the analyzer under test. 

a

Select the 

Overview

 tab at the bottom of the main window.

b

Click on each unused logic analyzer and select disable. Only the logic 
analyzer to be tested should remain enabled. 

Summary of Contents for 16900 Series

Page 1: ...Publication number 16910 97000 April 2004 For Safety and Regulatory information see the pages at the end of the book Copyright Agilent Technologies 2001 2004 All Rights Reserved Advanced Test Equipmen...

Page 2: ...eep timing analysis on half channels Eye Finder feature 4 GHz timing zoom with 64 k memory depth Expandable to 340 channels 16911A or 510 channels 16910A on a single clock Service Strategy The service...

Page 3: ...3 Chapter The 16910A Logic Analyzer The 16911A Logic Analyzer...

Page 4: ...rmance beginning on page 19 gives instructions on how to test the performance of the module Chapter 4 Calibrating beginning on page 61 contains calibration instructions for the module if required Chap...

Page 5: ...an the module 17 3 Testing Logic Analyzer Performance To Assemble the SMA Flying Lead Test Connectors 22 To Test the Minimum Master to Master Clock Time and Minimum Eye Width 27 Equipment Required 28...

Page 6: ...ent of the bits Pod 1 500 Mb s mode 57 Test Pod 2 in 500 Mb s Mode 57 Test the complement of the bits Pod 2 500 Mb s mode 58 Test Pods 3 and 4 in 500 Mb s Mode 16910A only 59 Conclude the State Mode T...

Page 7: ...ogic analyzer cable 85 To install the logic analyzer cable 86 To replace the circuit board 87 To return assemblies 88 7 Replaceable Parts Ordering Replaceable Parts 90 Replaceable Parts List 91 16910A...

Page 8: ...8 Contents...

Page 9: ...9 1 General Information This chapter lists the accessories some of the specifications and characteristics and the recommended test equipment...

Page 10: ...sis system mainframe The 16910 11A logic analyzers module will work with any version of the 16900 series logic analysis system operating system Accessories Agilent Part Number Flying Lead Probe Set E5...

Page 11: ...le only when Option 500 is installed tWidth minimum 1 5 ns 1 5 ns Specified at probe tip Eye width as measured by Eye Finder may be less Specifications verified under the following test conditions Par...

Page 12: ...its Operating Environment Temperature 0 to 40 C 32 F to 104 F when operating in a 16900A or 16902A mainframe 0 to 50 C 32 F to 122 F when operating in a 16903A mainframe Humidity Up to 80 relative hum...

Page 13: ...se time 8133A Option 003 P T 150 ps Transition Time Converter Qty 4 Required if pulse generator s rise time is less than 150 ps Voffset 1V V 600 mV Required for 8133A opt 003 Agilent or HP 15435A P Os...

Page 14: ...14 Chapter 1 General Information...

Page 15: ...15 2 Preparing for Use This chapter gives you instructions for preparing the logic analyzer module for use...

Page 16: ...35 C 68 F to 95 F Humidity 20 to 80 non condensing Storage Store or ship the logic analyzer in environments within the following limits Temperature 40 C to 75 C 40 F to 167 F Humidity Up to 90 at 65...

Page 17: ...allation guide in the quick search box Then scroll down to Manuals Guides Notifications to find the 16900A Series Logic Analysis Systems Installation Guide To test the module The logic analyzer module...

Page 18: ...18 Chapter 2 Preparing for Use...

Page 19: ...19 3 Testing Logic Analyzer Performance This chapter tells you how to test the performance of the 16910A or 16911A logic analyzer against the specifications listed on page 11...

Page 20: ...ese tests and test all channels at their discretion One card Module To perform a complete test on a one card module start at the beginning of the chapter and follow each procedure Multi card Module To...

Page 21: ...mmended test equipment You can use equipment that satisfies the specifications given However the procedures are based on using the recommended model or part number Instrument Warm Up Before testing th...

Page 22: ...pin strip header a Cut or cleanly break a 2 x 2 section from the pin strip Material Critical Specification Recommended Model Part SMA Board Mount Connector Qty 6 Johnson 142 0701 801 see www johnsonc...

Page 23: ...st Connectors b Trim about 1 5 mm from the pin strip inner leads and straighten them so that they touch the outer leads c Trim about 2 5 mm from the outer leads d Using a very small amount of solder t...

Page 24: ...ide of the SMA connector s frame as shown in the diagram below Use a small amount of solder 3 Attach the second SMA board mount connector a Re heat the solder connection made in the previous step and...

Page 25: ...rip and the center conductors of each SMA connector b Ensure that there is continuity between each of the two pins on the right side of the pin strip and the SMA connector frames c Ensure that there i...

Page 26: ...26 Chapter 3 Testing Logic Analyzer Performance To Assemble the SMA Flying Lead Test Connectors c The finished test connector is shown in the pictures below...

Page 27: ...position on every tested channel Eye Finder must be used to achieve minimum data eye width performance First the logic analyzer will be tested in the 250 Mb s state mode Then it will be tested in the...

Page 28: ...uired if pulse generator s rise time is less than 150 ps Pulse generator conditions Voffset 1V V 500 mV Required for 8133A opt 003 Agilent or HP 15435A Oscilloscope bandwidth 1 5 GHz sampling rate 8 G...

Page 29: ...d monitor to the rear panel of the logic analysis mainframe 16900A only b Connect the mouse to the rear panel of the mainframe c Plug in the power cord to the power connector on the rear panel of the...

Page 30: ...use all to be selected in the Select Test s list c Select Start This will perform a complete system self test The progress of the self tests is displayed in the Progress Statistics area of the window...

Page 31: ...cy uncertainty of the pulse generator plus a test margin of 1 For example if you are using an 8133A pulse generator the frequency accuracy is 1 of setting Use a test margin of 1 Set the frequency to 1...

Page 32: ...DC External Gain n a Coupling DC External Gain n a Input 50 ohm Skew Set later See page 37 Input 50 ohm Skew 0 0 seconds External Offset n a External Offset n a Setup Channel 3 Setup Channel 4 Off Off...

Page 33: ...th the 50 ohm terminator to the Transition Time Converter at the 8133A pulse generator Channel 1 OUTPUT If Transition Time Converters are not required connect the SMA Flying Lead test connector direct...

Page 34: ...g Lead connector s ground pins If you don t have the ground leads you can push the probe body s ground socket directly onto a ground pin on the SMA Flying Lead test connector However this will bend an...

Page 35: ...ale SMA adapters to Channels 1 and 2 on the 54845A oscilloscope 9 Attach one end of an SMA cable to the Male BNC to Female SMA adapter on Channel 1 of the oscilloscope 10 Attach the other end of the S...

Page 36: ...at the top of the display 2 Select Markers 3 In the Markers Setup window set marker Ay to 0 7 V and set marker By to 1 3 V 4 Observe the waveforms on the oscilloscope display If they are not centered...

Page 37: ...his using the large knob in the Horizontal setup section of the front panel 2 Select Setup from the menu bar at the top of the display 3 Select Channel 1 4 Select Probes 5 Click Skew to deskew Channel...

Page 38: ...Testing Logic Analyzer Performance Connect the Test Equipment was set to 1 volt in the oscilloscope setup described on page 32 6 Select Close in the Probe Setup window 7 Select Close in the Channel S...

Page 39: ...ement uncertainty and display resolution of the oscilloscope further reduced by 35 ps for test margin If you are using the 54845A B oscilloscope the measurement uncertainty is 0 007 t full scale 2x me...

Page 40: ...lysis system into its initial state 2 Disable all logic analyzers other than the analyzer under test a Select the Overview tab at the bottom of the main window b Click on each unused logic analyzer an...

Page 41: ...16910 11A logic analyzer to 1 V and select OK d The activity indicators will now show activity on the channels that are connected to the pulse generator e Un assign all channels Hint you can do this q...

Page 42: ...t channels 2 6 10 and 14 as shown g Drag the scroll bar all the way to the left and ensure that the activity indicator shows activity on clock 1 4 Set the sampling mode a Select the Sampling tab of th...

Page 43: ...s System f Ensure that the sampling speed is set to 250 MHz in the Sampling Options box NOTE If option 500 is not installed on the 16910 11A module then 250 MHz will be the only speed available g Ensu...

Page 44: ...vertically aligned as shown above In this case you can skip to the next section Run Eye Finder After running Eye Finder the blue bars will not be vertically aligned because an independent sample posit...

Page 45: ...on may vary Any skew between channel 1 and channel 2 of your pulse generator will cause the eye position to shift to the left or right in the Eye Finder display A shift of up to 0 5 ns should be consi...

Page 46: ...e sampling position of the other channels The following example shows the analyzer in the optional 500 Mb s mode That is why the eyes are closer together 8 Using the mouse drag the sample position blu...

Page 47: ...page 60 2 If an eye does not exist near 300 ps for every bit or Eye Finder can not place the blue bar in the narrow eye then the logic analyzer fails the test Record the result in the Test 1 of 2 Eye...

Page 48: ...the Position field to Value c Select the Occurs button and create the marker setup shown below 5 In the Value window select the Properties button 6 In the Value Properties window select Stop repetiti...

Page 49: ...continuously update If the can t find occurrence window appears then the logic analyzer fails the test Check your test setup If the failure is not the result of a problem with the test setup record t...

Page 50: ...g can cause a false failure If the error message is displayed immediately after making an adjustment to the pulse generator select OK to close the error display window and re run the logic analyzer Te...

Page 51: ...ls 6 Adjust the sampling positions using Eye Finder See page 44 7 Determine pass or fail 1 of 2 tests See page 47 8 Switch to the Listing window by selecting the Listing tab at the bottom of the main...

Page 52: ...ope s horizontal position to 725 ps or as required to center the measured pulse on the oscilloscope display 4 Verify the DC offset and adjust it if necessary See page 36 5 Deskew the oscilloscope if n...

Page 53: ...ay channels if necessary See page 46 14 Determine pass or fail 1 of 2 tests See page 47 15 Select OK to close the Analyzer Setup window 16 Switch to the Listing window by selecting the Listing tab at...

Page 54: ...ecord and proceed to Conclude the State Mode Tests on page 59 Clock Clk1 will be used for testing all pods in the 500 Mb s mode Therefore two E5383A Flying Lead Probe sets will be required when testin...

Page 55: ...argin as described on page 39 Do not change the pulse generator frequency yet 12 Select the Sampling tab 13 Select the Sampling Positions button A dialog will appear telling you that acquired data wil...

Page 56: ...margin of 1 Set the frequency to 250 MHz plus 2 255 MHz 19 The pulse measured on the oscilloscope may have moved slightly Verify the DC offset and adjust it if necessary See page 36 20 Verify the osc...

Page 57: ...illoscope display 3 Verify the DC offset and adjust it if necessary See page 36 4 Deskew the oscilloscope if necessary See page 37 5 Verify that the pulse width is set to 1 5 ns See page 39 6 Run Eye...

Page 58: ...essary See page 36 8 Deskew the oscilloscope if necessary See page 37 9 Readjust the pulse width from the pulse generator as measured on the oscilloscope See page 39 10 Unassign all Pod 1 bits 11 Assi...

Page 59: ...t available in this mode Upon completion the logic analyzer is completely tested 2 Complete the Performance Test Record on page 60 Conclude the State Mode Tests Do the following steps to properly shut...

Page 60: ...ay Resolution 54845B 5 ps Setting 125 MHz 2 127 5 MHz 250 MHz 2 255 MHz Pulse Width setting 1 43 ns PWmax worst case 1 43 ns 30 ps 5 ps 1 465 ns TEST RESULTS Logic Analysis System Self Tests Pass Fail...

Page 61: ...61 4 Calibrating This chapter gives you instructions for calibrating the logic analyzer...

Page 62: ...Calibration Strategy The 16910 11A logic analyzer does not require an operational accuracy calibration To test the module against the module specifications refer to the Testing Logic Analyzer Perform...

Page 63: ...63 5 Troubleshooting This chapter helps you troubleshoot the module to find defective assemblies...

Page 64: ...c components Use grounded wrist straps mats and standard ESD precautions when you perform any service to the mainframe or the modules in it CAUTION For protection against electrostatic discharge ESD p...

Page 65: ...65 Chapter 5 Troubleshooting Troubleshooting Flowchart 1...

Page 66: ...66 Chapter 5 Troubleshooting Troubleshooting Flowchart 2...

Page 67: ...written to and read back EEPROM Test The purpose of this test is to verify The address and data paths to the EEPROM That each cell in the EEPROM can be programmed high and low That individual locatio...

Page 68: ...ocks Test The purpose of this test is to verify that the four clocks 1 2 3 4 are functional between the master board and all Analysis chips and that the two Psync lines A B are functional between the...

Page 69: ...n receive the Local Arm signal and the Global Arm signal can be driven by the bottom and top chips on the master board and received by all chips in the module master and slave Note that the middle ana...

Page 70: ...70 Chapter 5 Troubleshooting To exit the test system 1 Simply close the self test window No additional actions are required...

Page 71: ...eak two 2 x 9 sections from the pin strip b Solder a jumper wire to all nine pins on one side of the pin strip c Solder a jumper wire to all nine pins on the other side of the pin strip d Solder two r...

Page 72: ...rip 2 Attach the SMA connector a Solder the center pin of the SMA connector to the center pin of one row on the pin strip b Solder the ground tab of the SMA connector to the pins of the other row on t...

Page 73: ...n page 30 2 Set up the pulse generator a Set up the pulse generator according to the following table Pulse Generator Setup Equipment Critical Specification Recommended Model Part Pulse Generator 40 MH...

Page 74: ...lse generator Channel 2 OUTPUT 3 Enable the pulse generator Channel 1 and Channel 2 outputs LEDs off Configure the logic analyzer to test Pod 1 1 Exit the logic analysis application from the main menu...

Page 75: ...hat the activity indicators the red arrows show activity on all 16 channels that are connected to the pulse generator d Assign all channels Hint you can do this quickly by clicking on the left most ch...

Page 76: ...ng mode a Select the Sampling tab of the Analyzer Setup window b Select State Mode c Set the Trigger Position to 100 Poststore d Set the Acquisition Depth to 128K e Clear the Timing Zoom check box to...

Page 77: ...bleshooting To test the cables NOTE If option 500 is not installed on the 16910 11A module then 250 MHz will be the only speed available g Ensure that the Clock Mode is set to Master h Set the clock m...

Page 78: ...nsure that the check box next to My Bus 1 is checked 3 Drag the blue bar for My Bus 1 to approximately 3 ns 4 Select the plus sign to expand bus My Bus 1 5 Select the Run button in the Eye Finder wind...

Page 79: ...main window 10 Select the Run icon 11 Data will appear in the Listing Window upon completion of the run 12 If the listing shows that the data alternates between AAAA and 5555 then the probe and cable...

Page 80: ...ture at the pulse generator s OUTPUT 2 5 If the pod to be tested Pod 2 in this example has a clock bit connect it to the 2 x 9 test fixture at the pulse generator s OUTPUT 2 NOTE Pods 5 and 6 of the 1...

Page 81: ...ting If the listing shows that the data alternates between 0 AAAA and 1 5555 or AAAA and 5555 if the pod does not have a clock bit then the probe and cable pass the test If the listing does not look s...

Page 82: ...82 Chapter 5 Troubleshooting To test the cables 18 Return to the troubleshooting flow chart...

Page 83: ...mblies This chapter contains the instructions for removing and replacing the logic analyzer module the circuit board of the module and the probe cables of the module as well as the instructions for re...

Page 84: ...the probe cables to the back panel To remove the module Instructions for removing or installing the module into the mainframe can be found in the installation guide for the mainframe If you don t hav...

Page 85: ...ppears turn the instrument off d Disconnect the power cord 2 Remove the logic analyzer cable a Use a T10 Torx driver to remove the screws that secure the logic analyzer cable to the rear panel b Gentl...

Page 86: ...r with the circuit board cable connector and gently apply pressure to seat the logic analyzer cable onto the circuit board connector 2 Secure the cable to the rear panel a Install the T10 screws two p...

Page 87: ...back panel and the ground spring 3 Replace the faulty circuit board with a new circuit board On the faulty board make sure the 2x15 30 pin ribbon cable is connected between J15 and J12 4 Position the...

Page 88: ...and address of owner Model number Serial number Description of service required or failure indications 2 Remove accessories from the module Only return accessories to Agilent Technologies if they are...

Page 89: ...89 7 Replaceable Parts This chapter contains information for identifying and ordering replaceable parts for your module...

Page 90: ...that has been repaired and performance verified by Agilent Technologies After you receive the exchange assembly return the defective assembly to Agilent Technologies A United States customer has 30 d...

Page 91: ...assemblies then other parts Information included for each part on the list consists of the following Reference designator if applicable Agilent Technologies part number Total quantity included with t...

Page 92: ...15 2306 4 MSPH M3 0 x 0 5 10 mm T10 Cable to Rear Panel H3 0515 0430 3 MSPH M3 0 x 0 50 6 mm T10 Rear Panel to Acquisition Board H4 16715 29101 1 Ground Spring 01650 94312 1 Label Probe and Cable Colo...

Page 93: ...E5339A Single Ended Low Voltage Probe MICTOR E5351A Single Ended Probe No Isolation Networks MICTOR 1253 3620 Samtec Connector 16760 02302 Shroud for 0 062 PC Boards 16760 02303 Shroud for 0 120 PC Bo...

Page 94: ...94 Chapter 7 Replaceable Parts 16910A Exploded View Exploded view of the 16910A logic analyzer...

Page 95: ...95 Chapter 7 Replaceable Parts 16911A Exploded View Exploded view of the 16911A logic analyzer...

Page 96: ...96 Chapter 7 Replaceable Parts...

Page 97: ...97 8 Theory of Operation This chapter presents the theory of operation for the logic analyzer card...

Page 98: ...in this chapter is to help you understand how the logic analyzer operates This information is not intended for component level repair Block Level Theory The block diagram of the 16910 11A logic analy...

Page 99: ...on IC Each Acquisition IC processes 32 channels of data and 2 channels of clock information The Acquisition ICs perform data sampling sequencing store qualification pattern recognition and counting fu...

Page 100: ...also provides a path for unloading acquired data to the analyzer display The FPGA converts bus signals generated by the mainframe processor into control signals for the logic analyzer card It also pro...

Page 101: ...eye width 27 minimum master to master clock time 27 module clean 17 inspect 16 remove 84 test 17 multi card module test 20 O one card module configure 17 test 20 operating environment 16 system 10 P p...

Page 102: ...102 Index...

Page 103: ...t the ground protection is impaired you must make the instrument inoperative and secure it against any unintended operation Service instructions are for trained service personnel To avoid dangerous el...

Page 104: ...is document is provided as is and is subject to being changed without notice in future editions Further to the maximum extent permitted by applica ble law Agilent disclaims all warranties either expre...

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