Agilent Technologies 1670E Series, User Manual

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Logic Analyzer Reference
The Analyzer Format Menu
Clock Inputs Display
Beneath the Clock Inputs display (Data on clks for the 1670E-series),
and next to the activity indicators, is a group of all clock inputs
available in the present configuration. The number of available clocks
depends on the model. The J and K clocks appear with pod pair 1/2, the
L and M with pod pair 3/4, and N and P with pod pairs 7/8 for the HP
1660 and 5/6 for the HP 1661. In a model with more than three pod
pairs, all other clock lines are displayed to the left of the displayed
master clocks, and are used only as data channels.
With the exception of the Range resource, all unused clock bits can be
used as data channels in the trigger terms. Activity indicators above
the clock identifier show clock or data signal activity.
Pod Clocks