Npaq® Hardware Manual
Maintenance
Table 4-4:
Control Board Test Points
Test Point
Function
Test Point
Function
TP1
PSO OPTO Power (external V+)
TP26
FireWire (8 KHz)
TP2
PSO OPTO Output
TP27
PSO Int.
TP3
PSO OPTO Return (external V-)
TP29
DSP Setting (Boot-Up)
TP4
Common
TP30
DSP Setting (Boot-Up)
TP5
Asynchronous Write Enable
TP31
PLD JTAG
TP6
Byte Enable 3
TP32
DSP Originated Reset
TP7
Asynchronous Read Enable
TP33
Chip Select 3
TP8
Byte Enable 2
TP34
Big / Little endian
TP9
Asynchronous Output Enable
TP35
GP I/O
TP10
Asynchronous Ready
TP36
Chip Select 1
TP12
Chip Enable 2
TP39
DSP External Interrupt 6
TP14
Byte Enable 0
TP40
F2 PSO Out Opto
TP15
Chip Select 0
TP41
PSO OUT 1
TP16
Byte Enable 1
TP43
PSO Out 2
TP17
System Reset
TP46
8 KHz
TP19
Timer 1 Output
TP47
CPLD JTAG
TP21
Timer 0 Output
TP51
PHY-Power
TP23
TINP1
TP52
CPLD JTAG
TP25
Timer Input
TP53
CPLD JTAG
* unlisted Test Points are reserved
The JTAG programming connector is a 14-pin header (J11) located on the Control board.
Table 4-5:
JTAG Programming Connector (Internal-J11)
Pin #
Label
Description
In/Out/Bi
1
TDI
Data Input
Input
2
Common
Signal Common
N.A.
3
TDO
JTAG Data Output
Output
4
Common
Signal Common
N.A.
5
TCK
JTAG Programming Clock
Input
6
Common
Signal Common
N.A.
7
Not Used
Not Used
N.A.
8
Enable
Enable
Input
9
Not Used
Not Used
N.A.
10
TMS
Test Mode Select
Input
11
+5V
+5 Volt
Output
12
Not Used
Not Used
N.A.
13
Not Used
Not Used
N.A.
14
Not Used
Not Used
N.A.
108
Chapter 4
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