Advantech PCE-5130, User Manual

Page: 54 / 102

PCE-5130 User Manual 42
! APIC Mode
This setting allows you to enable the APIC mode. The choices are “Disabled” or
“Enabled.”
! MPS Version Control For OS
This specifies the version of the Multiprocessor Specification (MPS) to be used.
Version 1.4 has extended configuration tables to improve support for multiple
PCI bus configurations and provide future expandability - use this for NT, and
possibly Linux. It is also required for a secondary PCI bus to work without the
need for a bridge. Leave it as 1.1 for older server Operating Systems.
3.5 Advanced Chipset Features
By choosing the “Advanced Chipset Features” option from the “Initial Setup Screen”
menu, the screen below will be displayed. This sample screen contains the manufac-
turer’s default values for the PCE-1530, as shown in Figure 3-4:
Figure 3.5 Advanced chipset features screen
! DRAM Timing Selectable
This item allows you to control the DRAM speed. The selections are “Manual” or
“By SPD”.
! CAS Latency Time
When DRAM Timing Selectable is set to [Manual], this field is adjustable. This
controls the CAS latency, which determines the time interval between SDRAM
starting a read command and receiving it. The options are [3T], [4T], [5T], and
[Auto].
! DRAM RAS# to CAS# Delay
When DRAM Timing selectable is set to [Manual], this field is adjustable. When
DRAM is refreshed, the rows and columns are addressed separately. This setup
item allows user to determine the timing of the transition from RAS (row address
strobe) to CAS (column address strobe). The less the clock cycles are, the
faster the DRAM speed is. Setting options are [2T] to [5T], and [Auto].
Note! DRAM default timings have been carefully chosen and should ONLY be
changed if data is being lost. Please first contact technical support.