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40
Operations
Leading
EDGE COMPUTING
With appropriate configuration of digitizer modules and effective
instrument support, however, trigger or timebase synchronization,
or both can be achieved, commensurate with application require-
ments.
As shown in the following, in a simple synchronization architec-
ture, two digitizer modules receive trigger and timebase from a
function generator. With required buffering of trigger and timebase
signals and equal wiring length between the function generator
and digitizers, trigger and timebase synchronization are possible.
In this scenario, the function generator is a master device that out-
puts trigger and timebase, and the two digitizers are slave devices
sharing the same trigger and timebase.
Figure 3-15: External Instrument Synchronization
Sine
Square
Ramp
Pulse
Noise
Function Generator
Output
Output
Sync
Digitizer #1
CLK IN
TRG IN
Digitizer #2
CLK IN
TRG IN
(Master)
(Slave)
(Slave)
TRG#1
TRG#2
CLK#1
CLK#2
Digitizer #1
Digitizer #2
Summary of Contents for PXIe-9834
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Page 10: ...x List of Figures Leading EDGE COMPUTING This page intentionally left blank ...
Page 12: ...xii List of Tables Leading EDGE COMPUTING This page intentionally left blank ...
Page 17: ...Introduction 5 PXIe 9834 Figure 1 2 Typical Frequency Response 50Ω input impedance ...
Page 30: ...18 Introduction Leading EDGE COMPUTING This page intentionally left blank ...
Page 34: ...22 Getting Started Leading EDGE COMPUTING This page intentionally left blank ...
Page 60: ...48 Calibration Leading EDGE COMPUTING This page intentionally left blank ...
Page 64: ...52 Important Safety Instructions Leading EDGE COMPUTING This page intentionally left blank ...