ADLINK Technology PXIe-9834, User Manual, Page: 19 / 65

Introduction 7
PXIe-9834
Table 1-8: External Reference Clock
1.3.7 Triggers
Table 1-9: Triggers
External Reference
Clock
Specification
Clock input range
0.45V
pp
to 5V
pp
Clock input coupling AC
Clock input impedance 50 Ω
Duty cycle tolerance 45% to 55%
Reference clock
frequency range
10MHz ± 2KHz
Trigger Source & Mode
Trigger source
Internal: software trigger
External:
X
External digital trigger from TRG IN (front panel)
X
Analog trigger from any of analog input channels
X
PXI Trigger Bus[0..7]
X
PXI STAR Trigger
X
PXIe_DSTARB
Trigger modes
X
Post-trigger
X
Delay trigger
X
Pre-trigger
X
Middle trigger
X
Re-trigger for post-trigger and delay trigger
modes