
52
System Layout
Leading
EDGE COMPUTING
Table 3-23: PCB Edge Connector Pin Definition
3.2.16
DB40 Connector
Figure 3-25: DB40 Connector Pin Definition
B39
GND
B40
GND
B41
GF_PCIEX3_TX_P
B42
GF_PCIEX3_TX_N
B43
GND
B44
GND
B45
GF_PCIEX4_TX_P
B46
GF_PCIEX4_TX_N
B47
GND
B48
PCH_CLK_REQ7-L
B49
GND
Pin
Signal
1
VCC_SPI_IN
2
GND
3
SPI_BIOS_CS0#
4
SPI_BIOS_CS1#
5
SPI_BIOS_MISO
6
SPI_BIOS_MOSI
7
SPI_BIOS_CLK
8
3V3_LPC
9
GND
10
BIOS_DIS0
Pin
Signal
Summary of Contents for DLAP-3000 Series
Page 8: ...viii List of Tables Leading EDGE COMPUTING This page intentionally left blank...
Page 10: ...x List of Figures Leading EDGE COMPUTING This page intentionally left blank...
Page 14: ...4 Introduction Leading EDGE COMPUTING This page intentionally left blank...
Page 34: ...24 Specifications Leading EDGE COMPUTING This page intentionally left blank...
Page 64: ...54 System Layout Leading EDGE COMPUTING This page intentionally left blank...
Page 69: ...Getting Started 59 DLAP 3000 3100 CF Left side screws Right side screws...
Page 130: ...120 BIOS Setup Leading EDGE COMPUTING This page intentionally left blank...
Page 140: ...130 Consignes de S curit Importante Leading EDGE COMPUTING This page intentionally left blank...