52
•
Operation Theory
4.5.2.4 High-Hysteresis analog trigger condition
Figure 41 shows the high -hysteresis analog trigger condition, the trigger
signal is generated when the input analog signal level is greater than the
High_Threshold voltage, and the Low_Threshold voltage determines the
hysteresis duration.
Figure 41: High-Hysteresis analog trigger condition
4.5.2.5 Low-Hysteresis analog trigger condition
Figure 42 shows the low-hysteresis analog trigger condition, the trigger
signal is generated when the input analog signal level is less than the
Low_Threshold voltage, and the High_Threshold voltage determines the
hysteresis duration.
Figure 42: Low-Hysteresis analog trigger condition