PCIe Accelerator-6D Card User Guide (UG074)
6
Speedster FPGAs
The PCIe Accelerator-6D's four QSFP+ modules support either four 40 gigabit Ethernet ports or sixteen 10
Gigabit Ethernet ports using breakout cables giving a total bandwidth of 160 Gbps. The card also supports PCI
Express Gen3 by 8, thus providing 64 Gbps bandwidth.
The Accelerator-6D is the perfect platform for building network and compute acceleration applications such as
line-rate deep packet inspection, encryption and decryption algorithms; image processing, machine learning and
database acceleration.
FPGA
Achronix 22-nm, AC22iHD1000F53C2
Functional Blocks
1 million equivalent LUTs (700k programmable LUTs + hard IP)
86 Mb of on-chip memory (82 Mb BRAM, 4 Mb LRAM)
756 28 × 28 multiply/accumulate blocks
960 programmable user I/O
Network and Communications
Hard Ethernet MACs: 100GE, 40GE, 10GE
64 SerDes lanes (1 to 12.75 Gbps)
Hard Interlaken ports, each running up to 11.3 Gbps
System
Hard PCI Express Gen1/2/3 ×1, ×4, ×8
Hard DDR3 controllers: six ×72 at 1600 MT/s
Board
PCI Express pluggable form factor
Three SMP connectors to provide differential and single-ended FPGA external clock
Twelve DDR3 SO-DIMM socket
Four 40 GE QSFP module ports
Power supply modules
Power-on reset circuitry
Oscillators/crystals/clock modules and synthesizers
Power and temperature measurement sensors
SPI header for flash memory access
Flash memory for device configuration
LEDs, switches, headers
JTAG header for bitstream programming via Bitporter pod and/or access to FPGA internal registers
