2-2
Service Guide
2.1 PCI 1250A
The Texas Instruments PCI1250A is a high-performance PC Card controller with a 32-bit PCI
interface. The device supports two independent PC Card sockets compliant with the 1995 PC Card
Standard. The PCI1250A provides a rich featured set which make it the best choice for bridging
between PCI and PC Cards in both notebook and desktop computers. The 1995 PC Card Standard
retains the 16-bit PC Card specification defined in PCMCIA Release 2.1, and defines the new
32-bit PC Card, CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1250A supports
any combination of 16-bit and CardBus PC Cards in the two sockets, powered at 5V or 3.3V as
required.
The PCI1250A is compliant with the PCI Local Bus Specification Revision 2.1, and its PCI
interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is
initiated during 16-bit PC Card DMA transfers, or CardBus PC Card bridging transactions.
All card signals are internally buffered to allow hot insertion and removal without external
buffering. The PCI1250A is register compatible with the Intel 82365SL-DF ExCA controller. The
PCI1250A internal data-path logic allows the host to access 8-, 16-, and 32-bit cards using full
32-bit PCI cycles for maximum performance. Independent buffering and a pipeline architecture
provide an unsurpassed performance level with sustained bursting. The PCI 1250A can also be
programmed to accept fast posted writes to improve system-bus utilization.
The PCl1250A provides an internally buffered zoom video path. This reduces the design effort of
PC board manufacturers to add a ZV compatible solution and guarantees compliance with the
CardBus loading specifications. Multiple system interrupt signaling options are provided including:
parallel PCI, parallel ISA, serialized ISA, and serialized PCI. Furthermore, general purpose inputs
and outputs are provided for the board designer to implement sideband functions. Many other
features are designed into the PCI1250A such as socket activity LED outputs, and are discussed in
detail throughout the design specification.
An advanced CMOS process is used to achieve low system power consumption while operating at
PCI clock rates up to 33MHz. Several low-power modes allow the host power management system
to further reduce power consumption.
2.1.1 Features
•
PCI Power Management Compliant
•
ACPI 1.0 Compliant
•
Packaged in a 256-pin BGA
•
PCI Local Bus Specification Rev. 2.1 Compliant
•
1995 PC Card Standard Compliant
•
3.3 Volt Core Logic with Universal PCI Interfaces Compatible with 3.3 Volt and 5 Volt PCI
Signaling Environments
•
Mix and Match 5V/3.3V PC Card16 Cards and 3.3V CardBus Cards
•
Supports Two PC Card
or CardBus Slots with Hot Insertion and Removal
•
Uses Serial Interface to TI TPS2206A Dual Power Switch
Summary of Contents for 390 Series
Page 15: ...System Introduction 1 3 Figure 1 2 PCB No 96183 1A Mainboard Layout Bottom ...
Page 96: ...2 50 Service Guide 2 3 3 Pin Configuration Figure 2 4 FDC37C67 TQFP Pin Diagram ...
Page 97: ...Major Chips Description 2 51 Figure 2 5 FDC37C67 QFP Pin Diagram ...
Page 102: ...2 56 Service Guide 2 3 6 Block Diagram Figure 2 6 FDC37C67 Block Diagram ...
Page 126: ...2 80 Service Guide 2 5 4 1 Functional Block Diagram Figure 2 10 M38813 Block Diagram ...
Page 128: ...2 82 Service Guide 2 6 2 Pin Diagram Figure 2 11 YMF715 Block Diagram ...
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