Acer 390 Series, Service Manual

Page: 125 / 204

Major Chips Description 2-79
2.5.4 Pin Descriptions
The pin functions are listed in the table below.
Table 2-10 M38813M4-XXXHP Pin Description
Pin Name Function
Vcc, Vss Power supply Power supply inputs 2.7 to 5.5V to Vcc, and 0V to Vss.
CNVss CNVss Controls the operating mode of the chip. Normally connected to Vss or Vcc.
RESET Reset input
To enter the reset state, this pin must be kept "L" for more than 2
µ
s (under
normal Vcc conditions). If the crystal or ceramic resonator requires more
time to stabilize, extend this "L" level time as appropriate.
.XIN
XOUT
Clock input
Clock output
Input and output signals to and from the internal clock generation circuit.
Connect a ceramic resonator or quartz crystal between the X
IN
and X
OUT
pins
to set the oscillation frequency. If an external clock is used, connect the
clock source to the X
IN
pin and leave the X
OUT
pin open.
P0
0
-P0
7
I/O port P0 An 8-bit CMOS l/O port. An l/O direction register allows each pin to be
individually programmed as either input or output. The input is CMOS/TTL
level, and output is CMOS 3 state / Nch open drain
P1
0
-P1
7
I/O port P1 An 8-bit CMOS l/O port with the same function as port P0. The input is
CMOS/TTL level, and output is CMOS 3 state
P2
O
-P2
7
I/O port P2 An 8-bit CMOS l/O port with the same function as port P0. The input is
CMOS/TTL level, and output is CMOS 3 state. P
24
-P
27
is the LED driver port
which capable of handling large current drive.
P3c-P37 I/O port P3 An 8-bit CMOS l/O port with the same functions as port P0. The input is
CMOS level, and output is CMOS 3 state. This port is used as input of key
on wake up and comparator functions. Pull-up transistor can be controlled
by the program.
P40-P47 I/O port P4 An 8-bit l/O port with the same functions as port P0. The input is CMOS TTL
level, and output of P4
0
-P4
3
,P4
6
,P4
7
is Nch open drain. And The P4
4
and
P4
5
are also used as the control signal outputs to the master CPU by
selecting by the program.
P5c-P53 I/O port P5 , An 4-bit CMOS l/O port with the same functions as port P0. The input is
CMOS level, and output is CMOS 3 state. The P5 also act as serial l/O
function pins by selecting by the program.
P60-P61 I/O port P6 An 2-bit CMOS l/O port with the same functions as port P0. The input is
CMOS level, and output is CMOS 3 state. The P6
0
also act as the control
signal to the master CPU, and P6
1
, act as l/O pin of the Timer X by
selecting by the program.
Ao,So,E/R
W
/
R/W
Input port The control bus which control the interface between master CPU. The input
is CMOS/TTL level, and output is CMOS 3 state.
DQo-DQ
7
Input port An 8-bit Input port used to interface with the master CPU. The input TTL
level, and output is CMOS/TTL level, and output is CMOS 3 state.