Major Chips Description
2-61
•
Panel Tables
•
Voltage Switching
•
Int 15 Hooks
•
Monitor Sensing
2.4.3 Introduction / Overview
The HiQVideo
family of high performance multimedia flat panel/CRT GUI accelerators extend
CHIPS' offering of high performance flat panel controllers for full-featured notebooks and sub--
notebooks. The HiQVideo family offers 64-bit high performance and new hardware multimedia
support features.
2.4.3.1 HiQColor
Technology
The 65555 integrates CHIPS breakthrough HiQColor technology. Based on a new proprietary
TMED (Temporal Modulated Energy Distribution) algorithm, HiQColor technology is a unique
process that enables the display of 16.7M colors on STN panels without dithering. TMED reduces
the need for panel turning associated with current FRC-based algorithms.
Independent of panel response times, the TMED algorithm eliminates all flaws such as shimmer,
Mach banding and crawling currently seen on STN panels. Combined with the new fast response
high contrast and low-crosstalk technology found in new STN panels. HiQColor technology enables
TF^T quality viewing on an STN panel. The 65555 provides the best color fidelity for the widest
variety of active and passive panels in the market.
2.4.3.2 Reduced Flicker Output Television
The television output circuitry supports both NTSC and PAL television formats. The 65555
provides filtering circuitry to reduce the flicker circuitry to reduce the flicker seen when displaying
CRT resolution images on television screens. The television circuitry scales images to fit both PAL
and NTSC televisions.
2.4.3.3 ZV Port Input
The 65555 supports the ZV port PCMCIA standard for video input. The ZV port video data is fed
directly to the graphics memory to reduce traffic on the PCI Bus.
2.4.3.4 Hardware Multimedia Support
The HiQVideo
family uses independent multimedia capture and display systems on-chip. The
capture system places data in display memory (usually off screen) and the display system places
the data in a window on the screen.
The capture system can receive data from either the system bus or from the ZV enabled video
port in either RGB or YUV format. The input data can also be scaled down before storage in
display memory. Capture of input data may also be double buffered for smoothing and to prevent
image tearing.
Summary of Contents for 390 Series
Page 15: ...System Introduction 1 3 Figure 1 2 PCB No 96183 1A Mainboard Layout Bottom ...
Page 96: ...2 50 Service Guide 2 3 3 Pin Configuration Figure 2 4 FDC37C67 TQFP Pin Diagram ...
Page 97: ...Major Chips Description 2 51 Figure 2 5 FDC37C67 QFP Pin Diagram ...
Page 102: ...2 56 Service Guide 2 3 6 Block Diagram Figure 2 6 FDC37C67 Block Diagram ...
Page 126: ...2 80 Service Guide 2 5 4 1 Functional Block Diagram Figure 2 10 M38813 Block Diagram ...
Page 128: ...2 82 Service Guide 2 6 2 Pin Diagram Figure 2 11 YMF715 Block Diagram ...
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