2-18
Chapter 2
(15). System Management Bus Headers
This header is reserved for system management bus (SM bus). The SM bus is a specific implementation
of an I
2
C bus. I
2
C is a multi-master bus, which means that multiple chips can be connected to the same
bus and each one can act as a master by initiating a data transfer. If more than one master simultaneously
tries to control the bus, an arbitration procedure decides which master gets priority.
AN7
Summary of Contents for AN7
Page 1: ...AN7 Socket 462 System Board User s Manual 4200 0390 02 Rev 1 00 ...
Page 5: ...1 User s Manual ...
Page 18: ...14 14 AN7 AN7 ...
Page 21: ...Introduction 1 3 1 2 Layout Diagram User s Manual ...
Page 22: ...1 4 Chapter 1 AN7 ...
Page 66: ...3 24 Chapter 3 3 24 Chapter 3 AN7 AN7 ...
Page 67: ...BIOS Setup 3 25 BIOS Setup 3 25 User s Manual User s Manual ...
Page 68: ...3 26 Chapter 3 AN7 ...
Page 70: ...A 2 Appendix A AN7 ...
Page 76: ...C 2 Appendix C AN7 ...