ABB Relion REG670, Technical Manual

Page: 640 / 1298

The function will compare the values for the bus and line voltage with the set values
for
UHighBusSynch and UHighLineSynch , which is a supervision that the voltages are
both live. Also the voltage difference is checked to be smaller than the set value for
UDiffSynch , which is a p.u value of set voltage base values. If both sides are higher
than the set values and the voltage difference between bus and line is acceptable, the
measured values are compared with the set values for acceptable frequency
FreqDiffMax and FreqDiffMin , rate of change of frequency FreqRateChange and
phase angle, which has to be smaller than the internally preset value of 15 degrees.
Measured frequencies between the settings for the maximum and minimum frequency
will initiate the measuring and the evaluation of the angle change to allow operation
to be sent in the right moment including the set
tBreaker time. There is a phase angle
release internally to block any incorrect closing pulses. At operation the SYNOK
output will be activated with a pulse
tClosePulse and the function resets. The function
will also reset if the synchronizing conditions are not fulfilled within the set
tMaxSynch time. This prevents that the function is, by mistake, maintained in
operation for a long time, waiting for conditions to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete
SESRSYN function and block of the Synchronizing function respectively.
TSTSYNCH will allow testing of the function where the fulfilled conditions are
connected to a separate output.
Section 14
1MRK502052-UEN B
Control
634
Technical manual