ABB REL 352 Instruction Manual Download Page 39

Page: 39 / 163

I.L. 40-201.9

Power Automation and Protection Division

3-18

REL 352 Version 1.00

Figure 3-11. Mho Characteristics for Three-Phase Fault Detection

ZGR

ZP:

Forward Reach Setting

ZGR:

Reverse Reach Setting

Maximum Torque Angle

Balance Point

ESK00043

Sub 5

Summary of Contents for REL 352

Page 1: ...er Power Automation and Protection Division 4300 Coral Ridge Drive Coral Springs Florida 33065 October 1996 Instruction Manual 40 201 9 NUMERICAL PHASE COMPARISON TRANSMISSION LINE PROTECTION SYSTEM REL 352 Version 1 00 ...

Page 2: ......

Page 3: ... are subject to change without notice All possible contingencies which may arise during installation operation or maintenance and all details and variations of this equipment do not pur port to be covered by these instructions If further information is desired by purchaser regarding a particular in stallation operation or maintenance of equipment the local ABB representative should be contacted Co...

Page 4: ...ked items will be charged to the customer Document Overview Section 1 provides the Product Description Section 2 provides Specifications and External Connections Sec tion 3 presents applications with related Catalog Numbers for ordering purposes Installation Operation and Maintenance are described in Section 4 with related Setting Calculations in Section 5 Appendices A thru H include related modul...

Page 5: ...ION MAINTENANCE 4 SETTING CALCULATIONS 5 BACKPLANE MODULE A INTERCONNECT MODULE B RELAY OUTPUT MODULE C OPTOISOLATED INPUT MODULE D MICROPROCESSOR MODULE E DISLAY MODULE F POWER SUPPLY MODULE G ANALOG INPUT MODULE H ACCEPTANCE TESTS I COMPUTER COMMUNICATIONS J APPLICATION NOTES K SYSTEM DIAGRAMS L Star next to section title indicates changes made within chapter since last issue ...

Page 6: ...cteristics for Phase to phase Fault Detection 3 19 3 13 Loss of Potential Block Logic 3 20 3 14 Zone 2 And Zone 3 Back up System 3 21 3 15 Optional Directional Overcurrent Units 3 22 3 16 Blinders For The Out of step Logic 3 23 3 17 OST And OSB Logic Diagram 3 24 4 1 REL 352 Backplate 4 12 A 1 REL 352 Backplane Module Component Location Diagram A 2 A 2 REL 352 Backplane transformer Module PC Board...

Page 7: ...m F 2 F 2 REL 352 Display Module Schematic F 3 G 1 REL 352 Power Supply PC Board G 3 G 2 REL 352 Power Supply Schematic See inside back cover G 4 H 1 REL 352 Analog Input Module Block Diagram H 2 H 2 REL 352 Analog Input Module Component Location Diagram H 3 H 3 REL 352 Analog Input Module Schematic H 4 H 3 REL 352 Analog Input Module Schematic H 5 H 3 REL 352 Analog Input Module Schematic H 6 H 3...

Page 8: ...s 4 rack units 1 75 each 177 mm Width 19 483 mm Depth 13 6 345 mm Weight 38 Lbs 17 5 kg All of the relay circuitry with the exception of the input isolation transformers and first line surge protection are mounted on the inner chassis to which the front panel is attached The outer chassis has a backplate which is a receptacle for all external connections including Digital Communication Interface T...

Page 9: ...e Backplane at the rear to the Analog Input and Power Supply modules at left and right respectively to the Relay Out put and Optoisolated Input modules in the center and to the Microprocessor and Display mod ules at the front of the inner chassis The Interconnect module receives inputs VAG V B G V CG I A I B I C from the Backplane module and feeds them to the Analog Input module This module also c...

Page 10: ...ay module interfaces with the Processor 1 system of the Microprocessor module The Display module contains 2 blue vacuum fluorescent alphanumeric displays for value and function fields each field has 4 characters 7 LEDs with 7 corresponding keys for selection purposes provide function interpretation capabilities See Section 4 and Appendix F for further details 1 7 Power Supply Module Three differen...

Page 11: ...al contacts when Extended Contact Output option is used Reclose initiate 2 Form A Reclose initiate 2 Form A Reclose block 2 Form A General start 1 Form A System failure alarm 1 Form B Trip alarm 2 Form A Channel alarm 1 Form A 2 SELF CHECKING SOFTWARE REL 352 continually monitors its ac input subsystems using multiple A D converter calibration check inputs plus loss of potential and loss of curren...

Page 12: ...AM failure is detected 3 UNIQUE REMOTE COMMUNICATION WRELCOM PROGRAM Two optional types of remote interface can be ordered RS232C for single point computer communication INCOM for local network communication A special PC software WRELCOM RCP and OSCAR program are available for obtaining or sending the setting information to the REL 352 The REL 352 front panel shows two fault events last and previo...

Page 13: ...I L 40 201 9 Power Automation and Protection Division 1 6 REL 352 Version 1 00 Figure 1 1 REL 352 Front Panel ...

Page 14: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 1 7 1 Figure 1 1a REL 352 Rear view ...

Page 15: ...ion 1 8 REL 352 Version 1 00 Figure 1 2 Layout of REL 352 Modules within Inner and Outer Chassis PONI BACKPLANE BD PROCESSOR BD DISPLAY BD FT 14 POWER SUPPLY ANALOG INPUT BD FT 14 OPTOISOLATED INPUT BD RELAY OUTPUT BDS XFMR INTERCONNECT BD SPT Top View ...

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Page 17: ...I L 40 201 9 Power Automation and Protection Division 1 10 REL 352 Version 1 00 Figure 1 4 Block Diagram of REL 352 Relay Sub 99 1618C33 ØA Trip Direction Line ct IAR IA 6 5 ...

Page 18: ...t to A D converter 10 Second 240 V rms limited by input transformer flux density Maximum Permissible ac Current Continuous 15 A rms limited by thermal characteristics 1 Second Operational 160 A rms 5 A nominal 32 A rms 1 A nominal limited by maximum input to the A D converter Thermal 500 A dc Battery Voltages Nominal Input Range 60 48 Vdc 38 70 Vdc 110 125 Vdc 88 150 Vdc 220 250 Vdc 176 280 Vdc dc...

Page 19: ...A 48 V 6 mA 125 V 6 mA Interfaces to Power Line Carrier ON OFF and FSK Audio Tone and Microwave Mark 1 Space 1 Channel Failure 1 Mark 2 Space 2 Channel Failure 2 4 2 OUTPUT Optoisolated 7500 V peak Power Transistor Output Rated 400 V supporting external dc power supply operation in the range of 20 150 V dc Interfaces to Carrier on off for ON OFF PLC or Carrier mark space for FSK PLC control 5 OPTI...

Page 20: ...SI C37 90 IEC 255 5 Open contacts 1400 Vdc continuous Impulse Voltage Withstand 5 kV Peak 1 2 50 microseconds 0 5 Joule IEC 225 5 Surge Withstand Voltage 3 kV 1 MHz ANSI C37 90 1 IEC 255 22 1 Fast Transient Voltage 4 kV 10 100 ns Withstand ANSI C37 90 1 IEC 255 22 4 EMI Field Strength Withstand 25 MHz 1GHz 10V m Withstand ANSI C37 90 2 Electrostatic Discharge Tests IEC 255 22 2 IEC 801 Y 8 12 kV t...

Page 21: ...tection Division 2 4 REL 352 Version 1 00 Figure 2 1 REL 352 Outline Drawing 447 294 17 610 21 666 0 853 346 049 13 624 290 601 11 441 17 653 0 695 482 600 19 000 0 242 6 147 0 090 2 286 1 477 37 516 140 R 3 556 4 000 101 600 6 954 176 632 ...

Page 22: ...p is desired blinders have been provided for detecting this con dition OST Out of Step Trip is included Trip under OST conditions may be selected via a re lay setting even when the channel is sound and the system is performing only phase comparison An Overcurrent tripping function is also included in the relaying system The Highset overcur rent function activates the trip outputs when the phase IP...

Page 23: ... system settings that control the sensitivity of the relaying system The sinusoidal waveform IT is converted into square waves for phase comparison as illustrated in Figure 3 3 2 1 Local Positive LP and Local Negative LN These waveforms are used to represent a phase of positive and negative half cycle of the IT signal at a local terminal The local positive LP is defined as a logic 1 in the positiv...

Page 24: ...N OFF POWER LINE CARRIER APPLICATIONS As seen on Figures 3 4 3 5 and 3 6 the negative half cycle comparisons only are performed setting COMM 2 ON OFF PLC operates in the quiescent mode i e during normal load state of the transmis sion line the carrier is turned off this corresponds to the SPACE condition asserted to contin uous 1 state at the receiver Therefore to block tripping on external faults...

Page 25: ...f the sequence filter IT The signal IT can be thought of as current and the setting for FD2 as the setting of a normal overcurrent unit It is recommended that FD2 be set below the minimum three phase fault magnitude and above the maximum expected load current multiplied by the respective coefficients C0 C1 and C2 The system for added security provides another faster and reliable fault detector Thi...

Page 26: ...ward zone reach setting in secondary ohms for SLGF ZRG Reverse reach setting in secondary ohms for SLGF 7 3 Three phase Three phase fault detection see Figure 3 11 is accomplished by the logic operation of one of the three ground units plus the 3øF output signal from the phase selector unit However for a 3 phase fault condition the computation of the distance units will be VXG IXZP eq 3 and eq 4 w...

Page 27: ...nd faults are covered by the operation of the de scribed units For the indication of a phase distance trip the following conditions have to occur 1 For a three phase fault the RT blinder if the system has OST logic included and no OSB and the 3Ph output of the phase selector and any of the phase to ground units have to have operated to indicate a three phase fault 2 For a Phase to Phase fault only...

Page 28: ...is also for load restriction and if any three phase fault occurs the inner blinder 21 BI has to be activated for tripping and the impedance be in either Zone 2 or Zone 3 reach Figure 3 17 shows the OST and OSB logic This logic is being executed constantly in the relay regardless whether the relaying channel is sound or not OST logic applies in both the phase comparison system or in the distance ba...

Page 29: ...e initiate With 52b closed open breaker the sequence becomes 52b closed fault applied Pilot Trip RIFT Reclose block Explanation Closing of 52b before applying fault enables the RIFT logic after 250 msec The Pilot Trip ap pears to the relay to be on a first reclose rather than on initial trip the RIFT prevents a second reclose Initial trip is always without 52b breaker closed thus a reclose is init...

Page 30: ...ny A B C phase The algorithm has limitations especially when REL 352 is being applied to lines with series ca pacitors The above equations represent the apparent impedance to the relay and do not ac count for the presence of the series negative reactance The user should account for this in the final estimate This function is included in REL 352 when the optional distance back up system is included...

Page 31: ...I L 40 201 9 Power Automation and Protection Division 3 10 REL 352 Version 1 00 Figure 3 1 REL 352 Phase Comparison Fault Recognition 1 Normal Internal Fault 2 External Fault ...

Page 32: ...nd Protection Division I L 40 201 9 REL 352 Version 1 00 3 11 3 Figure 3 2 Symmetrical Component Filter Figure 3 3 Symmetrical Component Filter IA IB IC IT C0 I0 C1 I1 C2 I2 1 0 0 1 1 0 LP LN Mark Space IKEY IT Co C1 C2 ...

Page 33: ...Version 1 00 Figure 3 4 Internal Fault 1 0 0 1 1 0 LP LN IKEY ITLocal 1 0 IKEY ITRemote IKEY LP LN MARK SPACE POSITIVE NEGATIVE 1 0 1 0 1 0 1 0 1 0 1 0 NOTE For ON OFF Power Line Carrier only negative half cycle comparison is performed TRIP COINCIDENCE TRIP COINCIDENCE ...

Page 34: ...rsion 1 00 3 13 3 Figure 3 5 External Fault 0 1 1 0 LP LN ITLocal IKey ITRemote LP LN MARK TRIP SPACE TRIP POSITIVE NEGATIVE NOTE For ON OFF Power Line Carrier only negative half cycle comparison is performed 0 1 0 1 0 1 0 1 0 0 0 1 IKey 0 1 COINCIDENCE COINCIDENCE ...

Page 35: ...m Phase Currents IA IB IC C0 C1 C2 IT Sequence Network Filter IKEY LP LN IKEY LP LDT1 LDT2 LDT1 LDT2 S1 S2 M1 M2 CHOK CHOK 3 2 1 TERM 3 2 1 TERM 3 2 0 COMM CIN SPACE 1 MARK 1 SPACE 2 MARK 2 S1 M1 S2 M2 From Channel Receiver SETTING TERM OF TERMINALS 2 OR 3 TERMINAL LINE Fault Detector 2 FD2 COMM COMM INTFCE 2 ON OFF PLC OR 3 FSK PLC FD2 LN LP COMPARERS LN1 LN2 LP1 LP2 ...

Page 36: ...n 1 00 3 15 3 Figure 3 7 Pilot Trip Logic FD2 0 150 ARMT 0 CDT CIN 4 0 6 0 2 2 2 CNT 1 IH PLT SBP IL LDT 8 0 SBT STUB BUS TRIP COMPARISON AND PILOT TRIP TRIP OR 75 0 PT IKO 150 2 These Timers are 20 longer for 50 Hz FD2T COUT 2 2 2 0 40 0 25 2 2 0 30 COMM 2 3 PILOT TRIP ...

Page 37: ...ion and Protection Division 3 16 REL 352 Version 1 00 Figure 3 8 Fault Detector IT FD2 Fault Detection FD2 Level Setting Figure 3 9 Change Detector CD 0 150 CDT V I I IACD IBCD ICCD IGCD VACD VBCD VCCD CD 2 20 Higher for 50 Hz 2 ...

Page 38: ...on I L 40 201 9 REL 352 Version 1 00 3 17 3 Figure 3 10 Mho Characteristics for Single Phase to Ground Fault Detection ESK00042 X ZGF ZGR R ZGF Forward Reach Setting ZGR Reverse Reach Setting ϒ Maximum Torque Angle B Balance Point ϒ B Sub 3 ...

Page 39: ...nd Protection Division 3 18 REL 352 Version 1 00 Figure 3 11 Mho Characteristics for Three Phase Fault Detection X ZP ZGR R ZP Forward Reach Setting ZGR Reverse Reach Setting ϒ Maximum Torque Angle B Balance Point ϒ B ESK00043 Sub 5 ...

Page 40: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 3 19 3 Figure 3 12 Mho Characteristics for Phase to Phase Fault Detection Sub 1 9654A15 ...

Page 41: ...I L 40 201 9 Power Automation and Protection Division 3 20 REL 352 Version 1 00 Figure 3 13 Loss of Potential and Loss of Current Block Logic IO VO A N D A N D LOPB LOI ESK00047 Sub 2 ...

Page 42: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 3 21 3 Figure 3 14 Zone 2 and Zone 3 Back up System OSB Load Restriction Sub 1 2420F06 Sheet 2 in part ...

Page 43: ...I L 40 201 9 Power Automation and Protection Division 3 22 REL 352 Version 1 00 Figure 3 15 Optional Directional Overcurrent Units Sub 1 2420F06 Sheet 2 in part ...

Page 44: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 3 23 3 Figure 3 16 Blinders for the Out of Step Logic Sub 1 esk00257 ...

Page 45: ...I L 40 201 9 Power Automation and Protection Division 3 24 REL 352 Version 1 00 Figure 3 17 OST and OSB Logic Diagram Sub 1 2420F06 Sheet 2 in part ...

Page 46: ...ncluding REL 352 and communication equipment factory configured and tested The system will be delivered in sepa rate containers the interconnecting wiring harness and installation instructions will be included The following pages contain catalog numbers Please be aware that the complete system capability is not limited to Power Line Carrier found in these pages Other forms of communication equipme...

Page 47: ...C SINGLE SUPPLY 2 110 125 VDC SINGLE SUPPLY 3 220 250 VDC SINGLE SUPPLY 4 48 60 VDC DUAL SUPPLIES 5 110 125 VDC DUAL SUPPLIES 6 220 250 VDC DUAL SUPPLIES DISTANCE BACKUP RELAYING DIGIT 6 P BACKUP DISTANCE PROTECTION N NO BACKUP PROTECTION PILOT SYSTEM COMMUNICATION CHANNEL INTERFACE DIGIT 7 B BINARY I O INTRFACE TO PLC AM FM AUDIO TONE ANALOG MICROWAVE OPTOISOLATED 24 48 125 VDC EXTERNAL POWER SUP...

Page 48: ...ut 2 Alarms and Carrier Level Indication Transmitter alarms only T Receiver alarms and CLI only R Transmitter and Receiver alarms with CLI B No alarms or carrier level indication or carrier level outputs N Channel Type 2 Frequency 2 NA 3 Frequency Directional comparison line relaying plus transfer trip 3 Receiver Output Interface Solid State Transistor outputs S NA Electro Mechanical six contact o...

Page 49: ...Remote Checkback Module R No Checkback Module N DC DC Converter Power Supply 48 50 Vdc battery input 4 110 125 Vdc battery input 1 220 125 Vdc battery input 2 Bandwidth Filter Range Wideband filter W Narrow filter X Voice Adapter Voice Adapter Module with signaling V No Voice Adapter Module N Alarm and Carrier Level Indication With loss of dc power alarm relay R F Output alarm relay received carri...

Page 50: ...precaution can cause personal injury or undes ired tripping of outputs and component damage a Unscrew the front panel screws b Remove the optional FT 14 covers if supplied one on each side of the REL 352 c Open all FT 14 switches Do Not Touch the outer contacts of any FT 14 switch they may be energized d Slide out the inner chassis e Close all FT 14 switches f Replace the FT 14 covers g Reverse pr...

Page 51: ...t is provided for remote transmis sion of target data The serial port is also available for networking data communications and remote settings see section 4 7 NETWORK INTERFACE 3 REL 352 FRONT PANEL DISPLAY The front panel display consists of a vacuum fluorescent display set of seven LED indicators seven key switches as shown in Figure 1 1 3 1 Vacuum Fluorescent Display The vacuum fluorescent disp...

Page 52: ...NT PANEL OPERATION The front operator panel provides a convenient means of checking or changing settings and for checking relay unit operations after a fault Information on fault location trip types phase operating units and breakers which tripped become available by using the keys to step thru the information Targets fault data from the last two faults are retained even if the relay is deen ergiz...

Page 53: ...reference 4 3 Target LAST and PREVIOUS FAULT Mode The last two Fault records are assessable at the Front panel The LAST FAULT information is of the most recent fault the PREVIOUS FAULT information is of the fault prior to the LAST FAULT These displays contain the target information along with the Frozen data at the time of trip The LAST FAULT register shows one or two records stored by flashing th...

Page 54: ...BIT NUMBER Not used 0 Stub Bus 1 Not used 2 Target Reset 3 52b 4 Not Used 5 Not Used 6 Not Used 7 For Example The functions listed below Target Reset closed 52b contact closed Remaining contacts open will result in the following binary pattern Bit Pattern 0 0 0 1 1 0 0 0 Bit Number 7 6 5 4 3 2 1 0 HEX Value Field Display 1 8 For reference refer to Table 4 2 for the binary to hexadecimal conversion...

Page 55: ...y 4 Activate the ENTER key for the desired dura tion of the output relays operation 5 Depress the FUNCTION RAISE key to select the following parameters as desired FUNCTION VALUE FIELD FIELD DESCRIPTION TRIP RELY TRIP A B C BFI RELY Breaker Failure Initiate SRI RI1 1 2 RELY Reclose Initiate 3RI RI2 1 2 RELY Reclose Initiate RB RELY Recloser Blocking GS RELY General Start FALM RELY Failure Alarm TAL...

Page 56: ...ailures will result in a bit pattern ROM CHECKSUM Bit 2 Analog Input Bit 4 Processor 1 Bit 12 The bit pattern which results is shown below Bit Pattern 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 Bit Number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Hex VALUE 1 0 1 4 Display For normal error free system performance the VALUE field display is 0 The status display is generated by OR ing the self test status from Proc...

Page 57: ...z square wave at the XMTR KEY signal at the rear terminal TB4 12 Again the C1 co efficient must be set the same at both ends of the line NOTE Coefficients C0 and C2 for simplicity should be set to 0 at both ends REL 352 computes the CDT as the time delay between raising edge of the IKEY transmitted signal to the falling edge of the received SPACE signal Note that a load condition produces out of p...

Page 58: ...MP7 thru JMP9 for 48 125 Vdc input source CAUTION If the customer intends to use a voltage other than those specified above see Contact Input Module Schematic Appendix D 6 NETWORK INTERFACE Two options are available for interfacing between REL 352 and a variety of local and remote communication devices RS 232C PONI for single point computer communication INCOM PONI for local network communication ...

Page 59: ...angle 10 TARGET FAULT DATA INFORMATION The REL 352 stores 16 sets of targets fault data All 16 sets are accessible through INCOM but only the two most recent sets of data are accessible from the front panel see Table 4 5 The first part of the fault data contains Yes No targets see Table 4 6 which identify the cause of the trip and the status of certain system inputs and outputs the second part of ...

Page 60: ... in and out of the outer chassis from the front Mating connectors inside the case eliminate the need to disconnect external wiring when the inner chassis is removed b Remove the FT 14 switches mounted by two screws on the side walls c Remove the front panel with the Display module from the inner chassis by un screwing four screws behind the front panel d Remove the Microprocessor module by looseni...

Page 61: ...I L 40 201 9 Power Automation and Protection Division 4 12 REL 352 Version 1 00 Figure 4 1 REL 352 Backplate Sub 13 1354D22 Sheet 10 of 10 ...

Page 62: ...t Pickup Value In Amps IPH High Set Phase Trip Current Setting In Amps IGL Low Set Ground Current Pickup Value In Amps IGH High Set Ground Trip Current Setting In Amps IKEY Local Pickup For Enabling The Transmitter Keying Circuit TERM 2 or 3 Terminal Line COMM 2 or 3 State Communication Channel CINT Communication Interface Type future C0 Zero Sequence Coefficient C1 Positive Sequence Coefficient C...

Page 63: ... Zone 3 Phase Time Delay In Seconds Z3GF Zone 3 Ground Forward Distance Setting In Ohms Z3GR Zone 3 Ground Reverse Distance Setting In Ohms T3G Zone 3 Ground Time Delay In Seconds OST Out of step Trip Enable OSB Enable Out of step Blocking For Backup Protection RT Inside Blinder Setting In Ohms RU Outside Blinder Setting In Ohms OST1 Out of step Block Timer OST2 Out of step Trip On the way in Time...

Page 64: ...1 FD2 XX XX 0 04 X In 2 0 X In 0 02 X In Amps 1 IPLT XXXX 0 150 150 msec IPL XX XX 0 1 X In 0 8 X In 0 02 X In Amps 1 IPH XX XX 0 8 X In 16 0 X In 0 02 X In Amps 1 3 IGH XX XX 0 8 x In 16 0 X In 0 02 X In Amps 1 3 IKEY XX XX 0 04 X In 2 0 X In 0 02 X In Amps 1 TERM 2TRM 3TRM COMM 2ST 3ST CINT later C0 X XX 0 00 5 00 0 05 C1 X XX 0 00 5 00 0 05 C2 X XX 0 00 5 00 0 05 LDT1 XXX X 0 32 0 0 1 msec 1 LD...

Page 65: ... 15 00 0 10 ohms 4 OST1 XX XX 0 50 5 00 0 05 cycles OST2 XX XX 0 50 5 00 0 05 cycles OST3 XX XX 0 50 5 00 0 05 cycles OSOT XXXX 24 240 1 cycles 3 SETR YES NO TIME YES NO YEAR XXXX 1980 2079 1 year MNTH XX 1 12 1 month DAY XX 1 31 1 day WDAY SUN MON TUES WED THUR FRI SAT HOUR XX 0 23 1 hour MIN XX 0 59 1 minute NOTE 1 Current settings are per unit quantities The setting range is multiplied by the C...

Page 66: ... current angle XXXX deg VBG VBG metered voltage magnitude XXX X Volts VBG metered voltage angle XXXX deg IC IC metered current magnitude XXX X Amps IC metered current angle XXXX deg VCG VCG metered voltage magnitude XXX X Volts VCG metered voltage angle XXXX deg 3I0 3I0 metered Current Magnitude XXX X Amps 3I0 3I0 metered Current Angle XXXX deg DATE Date Month Day MM DD TIME Time Hours Minutes HH ...

Page 67: ...f step trip YES NO UNBK Unblock trip YES NO TG Time overcurrent ground trip YES NO Z2P Zone 2 phase fault YES NO Z2G Zone 2 ground fault YES NO Z3P Zone 3 phase fault YES NO Z3G Zone 3 ground fault YES NO Z Fault impedance XX XX ohms FANG Fault impedance angle XXX X deg DMI Fault distance in miles XXX X mi DKM Fault distance in kilometers XXX X km PFLC Pre fault load current XXX X Amps PFLV Pre fa...

Page 68: ...th Day MM DD YEAR Year of fault YYYY TIME Time of fault Hours Minutes HH MM SEC Time of fault Seconds XXXX sec MSEC Time of fault Milliseconds XXXX msec LDT1 LDT used at time of trip XXX X msec LDT2 LDT used at time of trip Term 2 XXX X msec IA IB IC 3I0 TABLE 4 6 TARGET FAULT DATA INFORMATION SHEET 2 OF 2 NOTES The YES NO targets are displayed only if they are YES The angles are not displayed if ...

Page 69: ...ware version in the REL 352 read only 2 2 System Frequency FREQ Select either 60 or 50 Hz depending on the power system frequency NOTE It is imperative that the proper selection of frequency is made prior to applica tion of power system currents and voltage 2 3 Readout in Primary Values RP A YES setting enables the REL 352 system to display all the monitored voltages and currents in primary kAmper...

Page 70: ...em that may not even be within the protective zone of the relay The change detector occurs when current or voltage change between the corresponding data samples spaced one power line cycle apart exceeds 12 5 Using of CD as a trigger of oscillographic data is of little practical value when a relay is connect ed to a live power system Numerous changes due to sudden load changes remote switching dist...

Page 71: ...e used for weak feed applications where the change in current may not be signifi cant to start the relaying system 4 2 Fault Detector FD2 The Fault Detector FD2 supervises trip function as illustrated on figure 3 7 It is computed by converting symmetrical component filter output waveform IT to its rms equivalent and compar ing it versus setting FD2 see figure 3 8 4 3 Symmetrical Component Coeffici...

Page 72: ... IKEY As explained in 3 2 2 and illustrated in figure 3 3 the IKEY defines the threshold generating the squarewave to be sent to the remote terminal Please be aware that the IT waveform from which this transmitted signal is generated is the function of coefficients described in section 4 3 above For the coefficients C0 0 7 C1 0 1 C2 0 2 The IKEY 0 3 is recommended The IKEY setting is the instantan...

Page 73: ...ting should be 0 4 13 Low Set Phase Unit IPL The low set overcurrent units perform the supervision of stub bus function tripping undesirably under line energization The phase IPL unit should be set at 1 5 times the net line charging current but must be at least 5 A Net line charging current is herein defined as the steady state net single end line charging phase current as measured under balanced ...

Page 74: ...ng on the setting of DTYP For Example Set XPUD 0 8 if DTYP miles and the line reactance is 0 8 Primary Ohms mile 5 2 Distance Unit Type for XPUD DTYP Either miles MI or kilometers km should be selected This setting should match the units used in XPUD 5 3 Line Positive sequence impedance setting angle PANG This setting relates directly to the assumed positive sequence impedance angle of the line It...

Page 75: ... ground back up unit TOG can be made directional if FDOG is in Set FDOG N to the make the IGH and TOG units directional 6 4 Ground directional unit polarization options DIRU The ground directional unit can be zero sequence or negative sequence polarized When zero sequence polarized it uses all zero sequence quantities to determine the power flow direction and it is very sensitive to zero sequence ...

Page 76: ...s 10 percent of the next shortest line Zone 3 timers for phase and ground should be set to coordinate with the forward and reverse adjacent Zone 2 trips Generally two times the Zone 2 timer may be chosen for the Zone 3 timer setting Zone 3 timer ranges between 0 4 and 0 6 seconds Applicable parameters and settings for the characteristics of the zones have been discussed already These are the PANG ...

Page 77: ...et T2G 0 15 if the min imum time delay for step distance coordination is 150 milliseconds 7 6 Zone 3 phase unit reach Z3P This setting controls the Zone 3 reach for phase to phase faults in secondary ohms It is always forward looking For Example If Z3 reach is 45 ohms at 75 set Z3P 45 7 7 ZONE 3 PHASE TIMER T3P Selects the time delay for Zone 3 Phase fault detection in seconds Set T3P 0 30 if the ...

Page 78: ...ic Set the relay to OUT If there is no need for an Out of Step Trip WAYI If the controlled Out of Step Trip is in the Way in to the operating characteristics of the relay WAYO If the controlled Out of Step Trip is in the Way out of the operating characteristics of the relay 8 2 Out of Step Block OSB This setting enables the Out of Step Block logic that blocks the Zone 2 and or Zone 3 distance unit...

Page 79: ...ition has been detected and the two blinders have operated Once it times out a trip signal is issued for OST For Example Set OST2 2 cycle 8 7 Out of Step Trip on the Way out timer OST3 This timer is started when an Out of Step condition has been detected and the OST2 timer has timed out and both 21 BI are NOT operated This permits controlling the time that the breaker opens OST3 0 5 cycles 8 8 Out...

Page 80: ...ivision 5 12 REL 352 Version 1 00 9 1 Setting the clock To set the clock in the relay set TIME YES The next fields are self explanatory Year YEAR Month MNTH Day DAY Day of the week WDAY Hour HOUR Minutes MIN Enter the correct values as appropriate ...

Page 81: ...igure A 1 and Schematic contains three voltage type transformers for VA VN VAN VB VN VBN VC VN VCN inputs A Transformer module see Figure A 2 and Schematic is piggybacked onto the Backplane module consisting of three current type transformers IA IB IC with three 0 1 resistors The primary windings of all six transform ers are directly connected to the input terminal TB6 1 thru 10 the secondary wind...

Page 82: ...I L 40 201 9 Power Automation and Protection Division A 2 REL 352 Version 1 00 1611C26 Sub 7 Figure A 1 REL 352 Backplane Module Component Location Diagram ...

Page 83: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 A 3 A A P P E N D I X Figure A 2 REL 352 Backplane Transformer Module PC Board 1502B38 Sub 1 ...

Page 84: ...I L 40 201 9 Power Automation and Protection Division A 4 REL 352 Version 1 00 Figure A 3 REL 352 Backplane Transformer Module Schematic 1612C22 Sub 5 ...

Page 85: ...include Optoisolated Transistor Output for Communication Transmitter Keying Selection for transmitter keying is provided by JMP7 Position Voltage 1 2 125 Vdc 3 4 48 Vdc 5 6 15 20 Vdc Factory setting is 5 6 15 20 Vdc Communication Receiver Interface Between Optoisolated Inputs on the Contact Input Module and the Microprocessor Module Channel alarm relay This interface also includes signal polarity ...

Page 86: ...I L 40 201 9 Power Automation and Protection Division B 2 REL 352 Version 1 00 1618C45 Sub 1 Figure B 1 REL 352 Interconnect Module Component Location Diagram ...

Page 87: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 B 3 B A P P E N D I X Figure B 2 REL 352 Interconnect Module Schematic 1618C35 Sub 1 ...

Page 88: ...I L 40 201 9 Power Automation and Protection Division B 4 REL 352 Version 1 00 Figure B 2 REL 352 Interconnect Module Schematic 1618C35 Sub 1 ...

Page 89: ...to the Microprocessor module s digital I 0 interface Connector JA connects relay contacts through the Backplane module to the outside world Opto isolators U1 U2 U3 and U4 interface logic level output signals from the Microprocessor module to relay driver transistors Q1 through Q4 respectively Output relays K1 K2 K5 K6 K9 K10 provide desired control operations Reed relays K3 K4 K7 K8 monitor the br...

Page 90: ...I L 40 201 9 Power Automation and Protection Division C 2 REL 352 Version 1 00 Figure C 1 REL 352 Relay Output Module Component Location Diagram 1611C27 Sub 3 ...

Page 91: ... Below Component 48V G01 125V G04 250V G07 R3 4 7 8 11 14 K1 2 5 6 K9 10 C1 2 3 4 Q1 2 3 4 750Ω 5 W 12V Relay 12V Relay 2 0 µF VN2410M 4 0K 5 W 24V Relay 24V Relay 1 0 µF VN2410M 15 0K 5W 48V Relay 48V Relay 0 47 µF ZVN0535R Figure C 2 REL 352 Relay Output Module Schematic OPTION 1611C36 Sub 3 Sheet 1 of 3 ...

Page 92: ...REL 352 Relay Output Module Schematic BASE 1 1611C36 Sub 3 Sheet 2 of 3 Table 2 Component 48V G02 125V G05 250V G08 R3 4 8 11 14 K1 2 6 K9 10 C1 2 4 Q1 2 3 4 750Ω 5 W 12V Relay 12V Relay 2 0 µF VN2410M 4 0K 5 W 24V Relay 24V Relay 1 0 µF VN2410M 15 0K 5W 48V Relay 48V Relay 0 47 µF ZVN0535R ...

Page 93: ...gure C 2 REL 352 Relay Output Module Schematic BASE 2 Table 2 Component 48V G03 125V G06 250V G09 R3 4 8 11 14 K1 2 6 K9 10 C1 2 4 Q1 2 3 4 750Ω 5 W 12V Relay 12V Relay 2 0 µF VN2410M 4 0K 5 W 24V Relay 24V Relay 1 0 µF VN2410M 15 0K 5W 48V Relay 48V Relay 0 47 µF ZVN0535R 1611C36 Sub 3 Sheet 3 of 3 ...

Page 94: ...ions JMP7 to JMP9 1 2 are for 15 20 Vdc 3 4 are for 48 125 Vdc 5 6 are for 220 250 Vdc Note Position 3 4 is the factory setting Receiver Inputs These inputs SPACE 1 MARK 1 CHAN FAIL 1 SPACE 2 MARK 2 CHAN FAIL 2 interface to an external communication receiver such as Power Line Carrier Audio Tone etc Jumper Positions JMP1 to JMP6 1 2 are for 15 20 Vdc 7 8 are for 48 Vdc 9 10 are for 125 Vdc Note Po...

Page 95: ...I L 40 201 9 Power Automation and Protection Division D 2 REL 352 Version 1 00 1618C38 Sub 1 Figure D 1 REL 352 Optoisolated Input Module Component Location Diagram ...

Page 96: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 D 3 D A P P E N D I X Figure D 2 REL 352 Optoisolated Input Module Schematic 1618C36 Sub 1 Sheet 1 of 2 ...

Page 97: ...I L 40 201 9 Power Automation and Protection Division D 4 REL 352 Version 1 00 1618C36 Sub 1 Sheet 2 of 2 Figure D 2 REL 352 Optoisolated Input Module Schematic ...

Page 98: ...unication Modem and analog digital subsystem Additionally Processor P1 accesses real time clock U16 which contains a battery for non volatile operation in the absence of power Both processor systems are interconnected via the dual port RAM 2k x 16 U32 This device has 2 separate ports each port permits independent asynchronous access for reads and writes to any memory location The chip arbitration ...

Page 99: ...PER SETTINGS Jumper functions are listed below Jumper Position Description JM1 JM1 1 2 2 3 Enable Relay Output Test Disable Relay Output Test Normal Operation JM2 JM2 JM3 JM4 JM7 JM8 JM9 1 2 2 3 2 3 2 3 2 3 2 3 2 3 Disable Display Saver Enable Display Saver Spare not used at this time JM5 JM5 1 2 2 3 P2 RAM 2kx8 P2 RAM 8kx8 or 32kx8 JM6 JM6 1 2 2 3 P2RAM 32kx8 P2 RAM 8kx8 or 2kx8 Factory Setting ...

Page 100: ...5 V Regulator RAM EPROM 32k x 16 32k x 16 8k x 8 2 U16 2 U26 2 U7 U23 1 U1 U14 3 U31 U46 4 U39 U47 U36 φ φ φ φ φ φ φ φ φ Relay Reed J6 J6 J3 8 5V Power Supply Communication Modem Interface J6 INCOM Network PONI Interface Operator Interface J6 J1 J2 A D Sub Interface J5 Contact Interface J6 Figure E 1 Microprocessor Module Block Diagram System Input 32k x 16 8k x 16 ESK00052 Outputs Relay Inputs ...

Page 101: ...rmanent RAM 4k x 16 8k EEPROM 8k x 8 64k EPROM Program Memory 32k x 16 80C196 special Function Registers FFFFH F000H E000H C000H A000H 8000H 6000H 4000H 100H 0H DATA MEMORY Figure E 2 REL 352 Processor 1 Memory Map ESK00053 Memory Mapped I 0 Dual Port RAM 2k x 16 RAM 4k x 16 Program Memory EPROM 80C196 Internal Register File FFFFH F000H E000H C000H 100H 0H 4k 4k 8k 48k Figure E 3 REL 352 Processor...

Page 102: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 5 E A P P E N D I X Figure E 4 REL 352 Microprocessor Module Component Location Diagram Sub 4 1611C22 Sheet 3 of 3 ...

Page 103: ...I L 40 201 9 Power Automation and Protection Division E 6 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 1 of 7 ...

Page 104: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 7 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 2 of 7 ...

Page 105: ...I L 40 201 9 Power Automation and Protection Division E 8 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 3 of 7 ...

Page 106: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 9 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 4 of 7 ...

Page 107: ...I L 40 201 9 Power Automation and Protection Division E 10 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 5 of 7 ...

Page 108: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 11 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 6 of 7 ...

Page 109: ...I L 40 201 9 Power Automation and Protection Division E 12 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 7 of 7 ...

Page 110: ...5 8 Not used 25a ID7 U25 9 ECF 24c PINT U41 24 HSI0 Not used 24a MRESET U41 15 EXTINT Not used 18a RECCHL U41 10 P0 5 Not used 18c TXMCHL U41 8 P0 6 Not used NOTE Low True Signal Table E 2 Outputs From Microprocessor To Communication Interface J6 Pin Signal Name Destination Function 23c OD0 U38 2 XMTR KEY 23a OD1 U38 5 Not used 22c OD2 U38 6 Not used 22a OD3 U38 9 Not used 21c OD4 U38 12 Not used ...

Page 111: ...unication Modem and analog digital subsystem Additionally Processor P1 accesses real time clock U16 which contains a battery for non volatile operation in the absence of power Both processor systems are interconnected via the dual port RAM 2k x 16 U32 This device has 2 separate ports each port permits independent asynchronous access for reads and writes to any memory location The chip arbitration ...

Page 112: ...PER SETTINGS Jumper functions are listed below Jumper Position Description JM1 JM1 1 2 2 3 Enable Relay Output Test Disable Relay Output Test Normal Operation JM2 JM2 JM3 JM4 JM7 JM8 JM9 1 2 2 3 2 3 2 3 2 3 2 3 2 3 Disable Display Saver Enable Display Saver Spare not used at this time JM5 JM5 1 2 2 3 P2 RAM 2kx8 P2 RAM 8kx8 or 32kx8 JM6 JM6 1 2 2 3 P2RAM 32kx8 P2 RAM 8kx8 or 2kx8 Factory Setting ...

Page 113: ...5 V Regulator RAM EPROM 32k x 16 32k x 16 8k x 8 2 U16 2 U26 2 U7 U23 1 U1 U14 3 U31 U46 4 U39 U47 U36 φ φ φ φ φ φ φ φ φ Relay Reed J6 J6 J3 8 5V Power Supply Communication Modem Interface J6 INCOM Network PONI Interface Operator Interface J6 J1 J2 A D Sub Interface J5 Contact Interface J6 Figure E 1 Microprocessor Module Block Diagram System Input 32k x 16 8k x 16 ESK00052 Outputs Relay Inputs ...

Page 114: ...rmanent RAM 4k x 16 8k EEPROM 8k x 8 64k EPROM Program Memory 32k x 16 80C196 special Function Registers FFFFH F000H E000H C000H A000H 8000H 6000H 4000H 100H 0H DATA MEMORY Figure E 2 REL 352 Processor 1 Memory Map ESK00053 Memory Mapped I 0 Dual Port RAM 2k x 16 RAM 4k x 16 Program Memory EPROM 80C196 Internal Register File FFFFH F000H E000H C000H 100H 0H 4k 4k 8k 48k Figure E 3 REL 352 Processor...

Page 115: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 5 E A P P E N D I X Figure E 4 REL 352 Microprocessor Module Component Location Diagram Sub 4 1611C22 Sheet 3 of 3 ...

Page 116: ...I L 40 201 9 Power Automation and Protection Division E 6 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 1 of 7 ...

Page 117: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 7 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 2 of 7 ...

Page 118: ...I L 40 201 9 Power Automation and Protection Division E 8 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 3 of 7 ...

Page 119: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 9 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 4 of 7 ...

Page 120: ...I L 40 201 9 Power Automation and Protection Division E 10 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 5 of 7 ...

Page 121: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 E 11 E A P P E N D I X Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 6 of 7 ...

Page 122: ...I L 40 201 9 Power Automation and Protection Division E 12 REL 352 Version 1 00 Figure E 5 REL 352 Microprocessor Module Schematic Sub 1 1612C18 Sheet 7 of 7 ...

Page 123: ...5 8 Not used 25a ID7 U25 9 ECF 24c PINT U41 24 HSI0 Not used 24a MRESET U41 15 EXTINT Not used 18a RECCHL U41 10 P0 5 Not used 18c TXMCHL U41 8 P0 6 Not used NOTE Low True Signal Table E 2 Outputs From Microprocessor To Communication Interface J6 Pin Signal Name Destination Function 23c OD0 U38 2 XMTR KEY 23a OD1 U38 5 Not used 22c OD2 U38 6 Not used 22a OD3 U38 9 Not used 21c OD4 U38 12 Not used ...

Page 124: ...t higher value Value Lower move to the next lower value Enter the value that has been selected for upper contact testing The Microprocessor module scans these switches once every cycle while in the background mode where it looks for phase current or phase voltage disturbances When a phase disturbance is detected the relay enters the fault mode While scanning the Microprocessor module updates the D...

Page 125: ...I L 40 201 9 Power Automation and Protection Division F 2 REL 352 Version 1 00 Figure F 1 REL 352 Display Module Component Location Diagram 1498B40 Sub 4 Sheet 7 of 7 ...

Page 126: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 F 3 F A P P E N D I X Figure F 2 REL 352 Display Module Schematic 1608C93 Sub 3 ...

Page 127: ...tially generated from voltage across Zener diode Z2 driving the emitter follower Q1 VC1 also initially powers transistors Q3 and Q4 thru di ode D1 When the voltage across C11 gradually builds up and overtakes VC1 transistors Q3 and Q4 will be powered through R16 and D2 When the voltage across C11 reaches about 75 of its final value the current through R3 will back bias Q1 through diode D4 turning ...

Page 128: ...ements of the electroluminescent display The status monitor U7 checks the health of each power supply by monitoring the 8 5 Vdc outputs of each sup ply The status outputs are normally low thus a high output means a failed power supply Terminal J2 12A 12C Each power supply is capable of delivering a total output of 35 W power distributed among its six load outputs Due to the maximum diode rating of...

Page 129: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 G 3 G A P P E N D I X Figure G 1 REL 352 Power Supply PC Board Sub 1 1612C63 Sheet 12 ...

Page 130: ......

Page 131: ...nternal sample and hold amplifier Additionally on request the A D converter executes a self calibrating routine that corrects zero errors and also full scale and linearity er rors Device U16 provides stable precision 5 000 V reference to the A D converter The autoranging circuitry provides 16 bits of dynamic range needed to measure high current values during power system faults The 13 bit output i...

Page 132: ... VA VB VC IA IB IC F F F F F F MUX 1 U13 1 U12 1 U11 2 U10 2 U9 2 U8 Antialiasing Filters To Voltage and Current Transformers via Interconnect Module 3I0 2 U7 3 U5 MUX Select J1 Yo 3 U4 Y Y 1 X8 3 U2 5 V 3 U3 2 5 V 3 U3 1 Autoranging Circuits A D REF Control Data 4 U15 Range Select 4 U16 To µ P Module J2 Comp Comp ESK00055 ...

Page 133: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 H 3 H A P P E N D I X Figure H 2 Analog Input Module Component Location Diagram Sub 4 1611C23 Sheet 3 of 3 ...

Page 134: ...I L 40 201 9 Power Automation and Protection Division H 4 REL 352 Version 1 00 Figure H 3 Analog Input Module Schematic Sub 2 1612C20 Sheet 1 of 4 ...

Page 135: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 H 5 H A P P E N D I X Figure H 3 Analog Input Module Schematic Sub 2 1612C20 Sheet 2 of 4 ...

Page 136: ...I L 40 201 9 Power Automation and Protection Division H 6 REL 352 Version 1 00 Figure H 3 Analog Input Module Schematic Sub 2 1612C20 Sheet 3 of 4 ...

Page 137: ...Power Automation and Protection Division I L 40 201 9 REL 352 Version 1 00 H 7 H A P P E N D I X Figure H 3 Analog Input Module Schematic Sub 2 1612C20 Sheet 4 of 4 ...

Page 138: ...18C33 Do not leave fault currents with trip relays energized for long periods of time 3 2 Power Connect the primary and secondary dc power as shown on 1618C33 Consult the relay nameplate for rated volt age NOTE Before turning on dc power check jumper positions on the Contact Input and Microprocessor modules See pages D 1 and E 2 4 ANALOG INPUT AND FRONT PANEL METERING TEST STEP 1 Turn on the prima...

Page 139: ... the terminals shown in the table below Using procedure described in 4 4 1 Section 4 verify proper response of the front panel display to contact input status changes 6 RELAY OUTPUT SUBSYSTEM TEST Using the procedure described in 4 4 1 1 in Section 4 verify operation of relay output subsystem The relay contact wiring is shown on Block Diagram 1618C33 System Diagrams section of this I L Please note...

Page 140: ...e are set for the desired battery voltage Freq 60 RP NO CTYP 5 CTR 5000 VTR 7000 OSC TRIP FDAT TRIP TRGG 3 00 TRGP 3 00 CD dI RBEN ALRB UNBK OUT CNT 1CNT ARMT 0 LP 0 50 FD2 1 00 IPL 0 50 IPH OUT IGL 0 50 IGH OUT IKEY 0 50 TERM 2TRM COMM 3ST CINT C0 1 0 C1 1 0 C2 1 0 LDT1 0 000 LDT2 0 000 XPUD 1 500 DTYP KM PANG 75 GANG 75 ZR 31 00 BKUP OUT LOPB NO FDOP IN FDOG IN DIRU ZSEQ IOM 0 5 TOG BLK Z2P 4 0 ...

Page 141: ... For Example To simulate 3 phase fault positive sequence apply Ia 3 0 A at 0 Ib 3 0 A at 120 Ic 3 0 A at 120 8 Functional Tests Optional Backup System For units that include the stepped distance backup system the following tests will functionally test all the dis tance units provided Connect terminal TB5 9 Channel Failure to battery This generates channel failure state disables phase comparison an...

Page 142: ...ages applied and compare the calculated impedance in the relay target data to the provided impedance in the table The displayed value should fall within 5 Also make sure that the trip times are within 100 to 132 milliseconds Zone 2 ground Z2G should operate in all of the above For reverse Zone 2 trips follow the next table V I Z app AG Va 20 0 Vb 69 120 Vc 69 120 Ia 4 75 Ib 0 Ic 0 3 0 75 BG Va 69 ...

Page 143: ...onds The following table tests external forward faults outside Zone 3 reach The system should not trip CG Va 69 0 Vb 69 120 Vc 10 120 Ia 0 Ib 0 Ic 4 135 1 5 105 V I Z app AG Va 25 0 Vb 69 120 Vc 69 120 Ia 3 75 Ib 0 Ic 0 5 0 75 BG Va 69 0 Vb 25 120 Vc 69 120 Ia 0 Ib 3 165 Ic 0 5 0 75 CG Va 69 0 Vb 69 120 Vc 25 120 Ia 0 Ib 0 Ic 3 45 5 0 75 V I AG Va 25 0 Vb 69 120 Vc 69 120 Ia 2 75 Ib 0 Ic 0 BG Va 6...

Page 144: ...ck approximation of the current required at different angles Ø is desired the following formula applies The phase to phase unit is totally directional For forward Zone 2 trips the following quantities should be ap plied V I AG Va 25 0 Vb 69 120 Vc 69 120 Ia 3 75 105 Ib 0 Ic 0 BG Va 69 0 Vb 25 120 Vc 69 120 Ia 0 Ib 3 75 15 Ic 0 CG Va 69 0 Vb 69 120 Vc 25 120 Ia 0 Ib 0 Ic 3 75 135 V I Z app AB Va 35...

Page 145: ...For forward external faults apply the following quantities The REL 352 should not trip The following quantities simulate reverse phase to phase faults V I Z app AB Va 35 0 Vb 35 120 Vc 69 120 Ia 5 45 Ib 5 135 Ic 0 6 12 75 BC Va 69 0 Vb 35 120 Vc 35 120 Ia 0 Ib 5 165 Ic 5 15 6 12 75 CA Va 35 0 Vb 69 120 Vc 35 120 Ia 5 105 Ib 0 Ic 5 75 6 16 75 V I AB Va 35 0 Vb 35 120 Vc 69 120 Ia 4 45 Ib 4 135 Ic 0...

Page 146: ... 0 Vb 69 120 Vc 35 120 Ia 4 75 Ib 0 Ic 4 105 PANG 65 GANG 65 ZR 3 0 BKUP OUT LOPB NO FDOP IN FDOG IN DIRU ZSEQ IOM 0 5 TOG BLK Z2P 8 5 T2P 0 1 Z2GF 6 5 Z2GR 0 01 T2G 0 1 Z3P 11 0 T3P 2 Z3GF 11 0 Z3GR 0 01 T3G 2 OST WAYO OSB BOTH RT 2 0 RU 4 0 OST1 2 OST2 3 OST3 3 OSOT 100 V Volts I Amps 1 Va 69 0 Vb 69 120 Vc 69 120 Ia 5 5 Ib 5 125 Ic 5 115 2 Va 20 0 Vb 20 120 Vc 20 120 Ia 4 5 25 Ib 4 5 145 Ic 4 5...

Page 147: ... NOTE Make sure that the loopback connections described in 7 1 and 7 2 are made Also the metered value CHRX displayed should be ARM Test 1 indicates the sequence of positions in the RX diagram to be applied and the time in cycles to hold the position and the action of the relay The fault impedance measured should be 10 6 105 ohms POS Z app 21 BI 41 BO 1 13 8 5 No No 2 4 47 25 No Yes 3 3 33 65 Yes ...

Page 148: ...a 9 pin DB 9P male connector and externally accessible dip switches next to the connector for setting the communication data rate This port option is al ways black in color can be set for speeds of 300 1200 2400 4800 or 9600 bps see Table J 2 and offers an option for IRIG B time clock synchronization input 1 3 Personal Computer Requirements Communication with the relay requires the use of Remote C...

Page 149: ...ion and Relay Password To gain access to certain communication port functions the REL 352 must have the remote setting capability permission SETR set to YES and knowledge of the relay password is required All communications port func tions listed below require SETR set to YES before the actions can be performed Update Change Settings Enable Local Settings capability Disable Local Settings capabili...

Page 150: ...s of oscillographic data are stored in REL 352 Each set includes seven analog traces Va Vb Vc Ia Ib Ic and In with one cycle pre fault and 7 cycle fault information and 20 sets of digital data based on 12 sam ples per cycle Refer to Section J 2 for detailed information NOTE IF POWER IS INTERRUPTED TO RELAY ALL OSCILLOGRAPHIC DATA WILL BE LOST NOTE A communications cable kit item identification num...

Page 151: ...g display files Table J 2 RS PONI Dip Switch Settings Dip Switch Pole Port Data Rate 1 2 3 bps 0 0 0 300 0 0 1 1200 0 1 0 2400 0 1 1 4800 1 0 0 9600 1 0 1 19200 1 1 0 1200 1 1 1 1200 Dip Switch Pole Auto Answer Rings 4 5 0 0 none 0 1 4 1 0 8 1 1 12 NOTE Turn the power OFF and ON anytime Dip Switch changes are made PHCOMP 352 BACKUP 352 AUXFNCT 352 R352ANA 352 PHASE COMPARISON BACKUP DISTANCE FUNCT...

Page 152: ...RMINAL 2 TRANSMITTED SIGNAL COINCIDENCE AND OUTPUT PILOT TRIP FAULT DETECTOR AUX BREAKER CONTACT CHANGE DETECTOR IKEY STRETCH SIGNAL CHANNEL FAILURE CHANNEL OK TRIP SEAL RECLOSE INITIATE RECLOSE BLOCK PLT 52b CDIV TRSL RI RB SEBR 21BO 21BI OSB OST Z2P Z2G Z3P Z3G Z2T Z3T TOG IOM LOP Pilot Trip Auxiliary Breaker Contact Change Detector Trip Seal Reclose Initiate Reclose Block Signal to Emergency Ba...

Page 153: ... TO TB4 10 OF REL 352 NOTE 4 WIRES 2 8 9 10 IN SHIELDED CABLE RUN WIRES 9 AND 10 IN SEPARATE PAIRS CONNECT SHIELD TO TB4 10 OF REL 352 Figure 1 REL 352 TCF 10B Interconnecting Diagram TCF 10B REL 352 SHIELD TB4 10 CHAN FAIL 1 SPACE 1 MARK 1 NOISE SPACE MARK COMM 20v TB1 3 TB1 4 TB1 2 TB1 6 TB1 1 TB5 9 TB5 7 TB5 8 TB5 10 TB4 6 TB4 5 TB4 13 TB4 12 TB4 11 TB4 4 TB4 6 TB4 5 PWR OFF KEY COMMON KEY XMTR...

Page 154: ... 1 state on the transmitted IKEY signal to correspond to logical 1 state on the MARK and log ical 0 state on the SPACE signals received at the far end of the protected line REL252 hardware optoisolated inputs and outputs and some types of data communication equipment such as TCF 10B introduce polarity inversions REL252 interface electronics provides signal polarity configuration normal invert on t...

Page 155: ...nction of ratio of IKEY setting and IT rms Figure 2 Signal Polarity REMOTE IKEY OUTPUT FROM uPROCESSOR IKEY OUT POLARITY INVERTED NORMAL TCF KEY INPUT TCF 10B INVERSION AND DELAY TCF MARK OUT REL 352 MARK 1 INPUT OPTO COUPLER INVERSION MARK 1 POLARITY INVERTED NORMAL OPTO COUPLER INVERSION SPACE 1 POLARITY INVERTED MARK 1 IN SPACE 1 IN NORMAL REL 352 SPACE 1 INPUT OPTO COUPLER INVERSION CHANNEL FA...

Page 156: ...xI0 C1xI1 C2xI2 Example Applying balanced 3 phase fault of 5A rms requires C1 1 to obtain IT of 5A rms I t r I f 60 r 0 0 05 1 2 t r 1 2 f r 2 asin f π i 0 48 Xi i π 24 sin yi i π 24 π 6 sin r t r 1000 0 8 33 0 05 8 15 0 1 7 96 0 15 7 77 0 2 7 58 0 25 7 39 0 3 7 2 0 35 7 01 04 6 81 0 45 6 62 0 5 6 42 0 55 6 21 0 6 60 1 0 65 5 8 0 7 5 59 0 75 5 37 0 8 5 15 0 85 4 90 0 9 4 67 0 95 4 43 1 4 17 1 05 3...

Page 157: ...mple Applying balanced 3 phase fault of 1A rms requires C1 1 to obtain IT of 1A rms I t r I f 50 r 0 0 05 1 2 t r 1 2 f r 2 asin f π i 0 48 Xi i π 24 sin yi i π 24 π 6 sin r t r 1000 0 10 0 05 9 77 0 1 9 55 0 15 9 32 0 2 9 1 0 25 8 87 0 3 8 64 0 35 8 41 0 4 8 17 0 45 7 94 0 5 7 7 0 55 7 46 0 6 7 21 0 65 6 96 0 7 6 7 0 75 6 44 0 8 6 17 0 85 5 9 0 9 5 61 0 95 5 31 1 5 1 05 4 67 1 1 4 33 1 15 3 95 1 ...

Page 158: ...ion I L 40 201 9 REL 352 Version 1 00 L 1 L A P P E N D I X SYSTEM DIAGRAMS Figure No Description Page No L 1 REL 352 Block Diagram L 2 L 2 REL 352 Logic Diagram Sheet 1 2 3 L 3 L 5 L 3 REL 352 Backup System Logic Diagram sheet 2 of 2 L 6 ...

Page 159: ...I L 40 201 9 Power Automation and Protection Division L 2 REL 352 Version 1 00 Figure L 1 REL 352 Block Diagram ØA Trip Direction Line ct IAR IA 6 5 ...

Page 160: ... 2 MARK 2 S1 M1 S2 M2 From Channel Receiver ECF EXTERNAL CHANNEL FAILURE 1 EXTERNAL CHANNEL FAILURE 2 NOTE Hardware Function SETTING S1 3 2 M1 COMM 0 X0R 75 0 S2 3 2 M2 COMM 0 X0R 75 0 3 2 TERM 1 ECF 2 3 1 CHOK 0 Logic 0 1 Logic 1 XOR DEFINITION INPUT 1 INPUT 2 OUTPUT 0 0 1 1 0 1 0 1 0 1 1 0 CHANNEL FAILURE LOW RECEIVE LEVEL DETECTION TERM OF TERMINALS 2 OR 3 TERMINAL LINE COMM Fault Detector 2 FD...

Page 161: ... Power Supply 2 PSE IAL IAH IACD VACD PHASE A FDOP A NONDIRECTIONAL DIRECTIONAL FDOP OUT IN OUT IN IPH IBL IBH IBCD VBCD PHASE B FDOP B FDOP OUT IN OUT IN IPH ICL ICH ICCD VCCD PHASE C FDOP C FDOP OUT IN OUT IN IPH IGL IGH IGCD GROUND FDOG OUT IN OUT IN IGH IH HIGH SET OVERCURRENT TRIP CHANGE DETECTOR IACD IBCD ICCD IGCD VACD VBCD VCCD IL LOW LEVEL SUPERVISION CDT 0 150 DV DI CD DI Opto Isolator O...

Page 162: ...CKUP SYSTEM 150 0 0 2500 PT FD2 CHOK 0 16 0 30 32 32 CDT BTRP OST SBT RIFT 250 500 52b PT RECL INTO FAULT OUT IN UNBLOCK UNBK f UNBLOCK 3PT GS CA TA FA CD CH ALARM GENERAL START CHANNEL ALARM TRIP ALARM FAILURE ALARM TRIP DC POWER OK BK2 BK1 BFI TRIP PSE L L RY1 RY2 BK1 BK2 BFI 1 BFI 2 BK4 BK3 BFI TRIP PSE L L RY1 RY2 BK3 BK4 BFI 3 BFI 4 BK6 BK5 BFI TRIP PSE L L RY1 RY2 BK5 BK6 BFI 5 BFI 6 ALRB RB...

Page 163: ...I L 40 201 9 Power Automation and Protection Division L 6 REL 352 Version 1 00 Figure L 3 REL 352 Backup System Logic Diagram Sub 1 2420F06 Sheet 2 of 2 ...

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