bdi
Wind
for Tornado™, BDI2000 (MPC8xx/MPC5xx)
User Manual
40
© Copyright 1997-2007 by ABATRON AG Switzerland
V 1.38
3.3.6 PPC Interrupt Handling
In Gateway mode, only a few PPC interrupts causes an entry into debug mode. Most of the interrupts
are handled by the application. By default, the Debug Enable Register (DER) is set as follows:
Debug Enable Register
If this is not appropriate for the application the default initialisation may be change with an entry in
the configuration file.
WSPR
149
0xFFE7400F
;DER: set debug enable register
Bit
Mnemonic
State
Describtion
0
-
1
RSTE
enabled
Reset Interrupt
2
CHSTPE
enabled
Check Stop
3
MCIE
Machine Check Interrupt
4-5
-
6
EXTIE
External Interrupts
7
ALIE
Alignment Interrupt
8
PRIE
Program Interrupt
9
FPUVIE
Floating-Point Unavailable Interrupt
10
DECIE
Decrementer Interrupt
11-12
-
13
SYSIE
enabled
System Call Interrupt (used to signal a pending WDB
answer)
14
TRE
Trace Interrupt
15-16
-
17
SEIE
Software Emulation Interrupt
18
ITLBMSE
Implementation Specific Instructuction TLB Miss
19
ITLBERE
Implementation Specific Instructuction TLB Error
20
DTLBMSE
Implementation Specific Data TLB Miss
21
DTLBERE
Implementation Specific Data TLB Error
22-27
-
28
LBRKE
Load/Store Breakpoint Interrupt
29
IBRKE
Instruction Breakpoint Interrupt
30
EBRKE
enabled
External Breakpoint Interrupt
31
DPIE
enabled
Developement Port Nonmaskable Request