background image

 

bdi

 

Wind

 

 for Tornado™, BDI2000 (MPC8xx/MPC5xx)

User Manual

 7

 

© Copyright 1997-2007 by ABATRON AG Switzerland 

V 1.38

 

BDI MAIN / TARGET A Connector Signals:

 

Mention of sources used: MPC860ADS User’s Manual, Revision A

 

Enhanced Debug Mode Detection:

 

For MPC8xx and MPC555 targets, debug mode (Freeze) detection also works when the BDM con-
nector pins VFLS0 and VFLS1 are not connected to the target. If not connected to VFLSx, this BDM
connector pins should be left open or tied to Vcc. The BDI uses the following algorithm to check if the
target is in debug mode (freezed):

 

BOOL PPC_TargetFreezed(void) {

  if ((VFLS0 != 1) | (VFLS0 != 1)) return FALSE;

  read debug port status;

  if (status == freezed) return TRUE;

  else                   return FALSE;

 

Pin

Name

Describtion

1

VFLS0

These pin and pin 6 (VFLS1) indicate to the debug port controller whether or not the MPC 
is in debug mode. When both VFLS0 and VFLS1 are at "1", the MPC is in debug mode.

2

SRESET

This is the Soft-Reset bidirectional signal of the MPC8xx. On the MPC5xx it is an output. 
The debug port configuration is sampled and determined on the rising-edge of SRESET 
(for both processor families). On the MPC8xx it is a bidirectional signal which may be driven 
externally to generate soft reset sequence. This signal is in fact redundant regarding the 
MPC8xx debug port controller since there is a soft-reset signal integrated within the debug 
port protocol. However, the local debug port controller uses this signal for compatibility with 
MPC5xx existing boards and s/w.

3+5

GND

 

System Ground

 

4

DSCK

 

Debug-port Serial Clock

 

During asynchronous clock mode, the serial data is clocked into the MPC according to the 
DSCK clock. The DSCK serves also a role during soft-reset configuration.

6

VFLS1

These pin and pin 1 (VFLS0) indicate to the debug port controller whether or not the MPC 
is in debug mode. When both VFLS0 and VFLS1 are at "1", the MPC is in debug mode. 

7

HRESET

This is the Hard-Reset bidirectional signal of the MPC. When this signal is asserted (low) 
the MPC enters hard reset sequence which include hard reset configuration. This signal is 
made redundant with the MPC8xx debug port controller since there is a hard-reset com-
mand integrated within the debug port protocol. 

8

DSDI

 

Debug-port Serial Data In

 

Via the DSDI signal, the debug port controller sends its data to the MPC. The DSDI serves 
also a role during soft-reset configuration.

9

Vcc Target

 

1.8 – 5.0V:

 

This is the target reference voltage. It indicates that the target has power and it is also used 
to create the logic-level reference for the input comparators. It also controls the output logic 
levels to the target. It is normally fed from Vdd I/O on the target board.

 

3.0 – 5.0V with Rev. A/B :

 

This input to the BDI2000 is used to detect if the target is powered up. If there is a current 
limiting resistor between this pin and the target Vdd, it should be 100 Ohm or less.

10

DSDO

 

Debug-port Serial Data Out

 

DSDO is clocked out by the MPC according to the debug port clock, in parallel with the 
DSDI being clocked in. The DSDO serves also as "READY" signal for the debug port con-
troller to indicate that the debug port is ready to receive controller’s command (or data).

Summary of Contents for bdiWind PowerPC MPC5xx

Page 1: ...bdiWind BDM interface for Tornado PowerPC MPC8xx MPC5xx User Manual Manual Version 1 38 for BDI2000 1997 2007 by Abatron AG ...

Page 2: ...d 17 3 1 Principle of operation 17 3 1 1 Gateway mode 17 3 1 2 Agent mode 18 3 2 Configuration File 20 3 2 1 Part INIT 21 3 2 2 Part TARGET 22 3 2 3 Part HOST 25 3 2 4 Part FLASH 26 3 2 5 Part REGS 32 3 3 BDM GATEWAY mode 34 3 3 1 Create a new directory for your hardware 34 3 3 2 Tornado 1 01 and Tornado II 35 3 3 3 Tornado II 36 3 3 4 Tornado 1 01 37 3 3 5 bdiWind UDP lite packet driver 38 3 3 5 ...

Page 3: ...2000 MPC8xx MPC5xx User Manual 3 Copyright 1997 2007 by ABATRON AG Switzerland V 1 38 6 Declaration of Conformity CE 50 7 Warranty 51 Appendices A BDI2000 Setup Update 52 B Troubleshooting 54 C Maintenance 55 D Trademarks 57 ...

Page 4: ...n better you can use fast Ethernet debugging with target systems without network capability In contrast to ICE debugging bdiWind supports task mode and system mode debugging The following figure shows how the BDI2000 interface is connected between the host and the target 1 1 BDI2000 The BDI2000 is the main part of the bdiWind system This small box implements the interface be tween the BDM pins of ...

Page 5: ...0x00000003 0x00FFEC04 WUPM 0x0000003C 0x33FFCC07 UPMA exception WUPM 0x0000003D 0xFFFFFFFF WUPM 0x0000003E 0xFFFFFFFF WUPM 0x0000003F 0xFFFFFFFF init memory controller WM32 0x02200104 0xFFE00D34 OR0 2MB all accesses 6ws time relax WM32 0x0220010C 0xFFFF8110 OR1 WM32 0x02200114 0xFFC00800 OR2 WM32 0x02200100 0x02800001 BR0 WM32 0x02200108 0x02100001 BR1 WM32 0x02200110 0x00000081 BR2 WM16 0x0220017...

Page 6: ...ION Target Connector BDI2000 A A A Ab b b ba a a at t t tr r r ro o o on n n n A A A AG G G G S S S Sw w w wi i i is s s ss s s s M M M Ma a a ad d d de e e e Target System MPC 8xx 9 1 10 2 The green LED TRGT marked light up when target is powered up 1 VFLS0 2 SRESET 3 GROUND 4 DSCK 5 GROUND 6 VFLS1 7 HRESET 8 DSDI 9 Vcc Target 10 DSDO 1 9 2 10 Rev A Rev A is the first BDI2000 version produced unt...

Page 7: ... s w 3 5 GND System Ground 4 DSCK Debug port Serial Clock During asynchronous clock mode the serial data is clocked into the MPC according to the DSCK clock The DSCK serves also a role during soft reset configuration 6 VFLS1 These pin and pin 1 VFLS0 indicate to the debug port controller whether or not the MPC is in debug mode When both VFLS0 and VFLS1 are at 1 the MPC is in debug mode 7 HRESET Th...

Page 8: ... setup has to be done see Appendix A During this process the target cable must be disconnected from the target system The BDI2000 needs to be supplied with 5 Volts via the BDI OPTION connec tor Rev A or via the POWER connector Rev B C For more information see chapter 2 2 1 External Power Supply To avoid data line conflicts the BDI2000 must be disconnected from the target system while programming t...

Page 9: ...ween 4 75V and 5 25V DC The maximal tolerable supply voltage is 5 25 VDC Any higher voltage or a wrong polarity might destroy the electronics Please switch on the system in the following sequence 1 external power supply 2 target system BDI TRGT MODE BDI MAIN BDI OPTION 13 1 14 2 BDI OPTION 1 NOT USED 2 GROUND 3 NOT USED 4 GROUND 5 NOT USED 6 GROUND 7 NOT USED 8 GROUND 9 NOT USED 10 GROUND 11 NOT U...

Page 10: ...peration the power supply to the BDI2000 must be between 4 75V and 5 25V DC The maximal tolerable supply voltage is 5 25 VDC Any higher voltage or a wrong polarity might destroy the electronics BDI TRGT MODE BDI MAIN BDI OPTION 13 1 14 2 BDI OPTION Connector The green LEDs BDI and TRGT marked light up when target is powered up Jumper and the jumper is inserted correctly 1 NOT USED 2 GROUND 3 NOT U...

Page 11: ... LED indicates the following BDI states MODE LED BDI STATES OFF The BDI is ready for use the firmware is already loaded ON The power supply for the BDI2000 is 4 75VDC BLINK The BDI loader mode is active an invalid firmware is loaded or loading firmware is active BDI TRGT MODE BDI MAIN BDI OPTION BDI TRGT MODE TARGET A TARGET B Rev A Rev B C ...

Page 12: ...elow RS232 Connector for PC host 5 2 3 7 8 6 1 4 5 2 3 7 8 6 1 4 GND RD TD RTS CTS DSR DCD DTR GND RD TD RTS CTS DSR DCD DTR BDI2000 A A A Ab b b ba a a at t t tr r r ro o o on n n n A A A AG G G G S S S Sw w w wi i i is s s ss s s s M M M Ma a a ad d d de e e e Target System RS232 MPC 8xx RS232 LI TX RX 10 BASE T 5 4 3 2 1 9 8 7 6 PC Host Rev A RS232 Connector for PC host 5 2 3 7 8 6 1 4 5 2 3 7 ...

Page 13: ...evelopment Environment The following explains the meanings of the built in LED lights LED Name Description LI Link When this LED light is ON data link is successful between the UTP port of the BDI2000 and the hub to which it is connected TX Transmit When this LED light BLINKS data is being transmitted through the UTP port of the BDI2000 RX Receive When this LED light BLINKS data is being received ...

Page 14: ...eader file for the BDM UDP lite packet driver bdipkt c The implementation file for the BDM UDP lite packet driver bdiSlip h The header file for the example SLIP UDP lite packet driver bdiSlip c The implementation file for the example SLIP UDP lite packet driver bdiHdlc h The header file for the example HDLC UDP lite packet driver bdiHdlc c The implementation file for the example HDLC UDP lite pack...

Page 15: ... configuration program consult the online help Remark Don t forget to press Transmit after you entered the configuration values Activating BOOTP The BDI can get the network configuration and the name of the configuration file also via BOOTP For this simply enter 0 0 0 0 as the BDI s IP address If present the subnet mask and the default gate way router is taken from the BOOTP vendor specific field ...

Page 16: ...equest from the client are granted This is the normal working mode The bdiWind system needs only read access to the configuration and VxWorks files The parameter p enables protocol output to the console window Try it The parameter w enables write accesses to the host file system The parameter d allows to define a root directory tftpsrv p Starts the TFTP server and enables protocol output tftpsrv p...

Page 17: ...unning on the host and the Target Agent running on the target This mode supports anything the original WindRiver target agent supports task specific breakpoints dynamically loading of new moduls and so on Whenever the bdiWind system is started target is powered on the following sequence starts In BDM Gateway mode the UDP frames are transfered via the target BDM interface In Serial Gateway mode the...

Page 18: ...ul to get an initial VxWorks code running or in the final state of a development when no debug support is linked into the application This mode also supports the PowerPC built in breakpoint logic It s possible to debug ROM resident applications Whenever the bdiWind system is started target is powered on the following sequence starts Power On initial configuration valid Get configuration file via T...

Page 19: ...al only the system context is supported Following a list of unsupported WDB requests and WDB requests with restrictions bkendModeSet Only WDB_MODE_EXTERN is accepted bkendMemFill Supported but large memory blocks may cause a target agent time out bkendMemMove Supported but large memory blocks may cause a target agent time out bkendMemChecksum Supported but large memory blocks may cause a target ag...

Page 20: ...y read by the BDI after every power on The syntax of this file is as follows comment part name identifier parameter1 parameter2 parameterN comment identifier parameter1 parameter2 parameterN part name identifier parameter1 parameter2 parameterN identifier parameter1 parameter2 parameterN etc Numeric parameters can be entered as decimal e g 700 or as hexadecimal 0x80000 ...

Page 21: ...t to the selected memory place address the memory address value the value to write to the target memory Example WM8 0xFFFFFA21 0x04 SYPCR watchdog disable WM16 address value Write a half word 16bit to the selected memory place address the memory address value the value to write to the target memory Example WM16 0x02200200 0x0002 TBSCR WM32 address value Write a word 32bit to the selected memory pl...

Page 22: ...core No debugging via BDM GATEWAY After loading and starting the VxWorks core The BDI es tablishes a communication channel between the target server on the host and the target agent on the target The second parameter UART HDLC defines the seri al communication protocol If no second parameter is present normal BDM communication is used This mode supports task level debugging AGENT The debug agent r...

Page 23: ...uction step is implemented Use thealternate step mode HWBP if the default step mode MSR SE bit causes problems TRACE This is the default mode Single step is implemented by setting the SE bit in MSR HWBP In this mode one or two hardware breakpoints are used to implement single stepping Example STEPMODE HWBP WORKSPACE address In order to access the floating point registers of a MPC5xx microproces so...

Page 24: ...d from the host via a Telnet session The port parameter defines the TCP port used for this BDI to host communication You may choose any port ex cept 0 and the default Telnet port 23 On the host open a Telnet session using this port Now you should see the UART output in this Telnet ses sion You can use the normal Telnet connection to the BDI in parallel they work completely independent Also input t...

Page 25: ...automatically after every reset mode AUTO MANUAL Example LOAD MANUAL START address The address where to start the VxWorks core If this value is not defined and the core is not in ROM the address is taken from the code file If this value is not defined and the core is already in ROM the PC will not be set before starting the VxWorks core This means the program starts at the normal reset address 0x0...

Page 26: ... flash this parameter is not used size the size of one flash chip in bytes Example CHIPSIZE 0x80000 BUSWIDTH width Enter the width of the memory bus that leads to the flash chips Do not en ter the width of the flash chip itself The parameter CHIPTYPE carries the information about the number of data lines connected to one flash chip For example enter 16 if you are using two AM29F010 to build a 16bi...

Page 27: ...make erasing of multiple flash sectors easier you can enter an erase list All entries in the erase list will be processed if you enter ERASE at the Telnet prompt without any parameter This list is also used if you enter UNLOCK at the Telnet without any parameters address Address of the flash sector block or chip to erase mode BLOCK CHIP UNLOCK Without this optional parameter the BDI executes a sec...

Page 28: ...ucture of the address module address The 16 most significant bits of the flash module address C The censor bit If this bit is set the censor information is erased sbb The bit mask to select the small blocks to erase Bit ordering is the same as in the UC3FCTL register see MPC565 manual block The bit mask to select the flash block to erase Bit ordering is the same as in the UC3FCTL register see MPC5...

Page 29: ... AMD and AT49 algorithm support chip erase Block erase is only supported with the AT49 algorithm If the algorithm does not support the selected mode sector erase is performed If the chip does not support the selected mode erasing will fail The erase command sequence is different only in the 6th write cycle Depending on the selected mode the following data is written in this cycle see also flash da...

Page 30: ... bits of an Intel J3 Strata flash takes up to 0 7 seconds If unlock is used without any parameter all sectors in the erase list with the UNLOCK option are processed To clear all lock bits of an Intel J3 Strata flash use for example BDI unlock 0xFF000000 1000 To erase or unlock multiple continuos flash sectors blocks of the same size the following Telnet commands can be used ERASE addr step count U...

Page 31: ...or 6 of flash SIMM ERASE 0x029C0000 erase sector 7 of flash SIMM MPC555 internal flash INIT WSPR 638 0x00000802 IMMR InternalRegs to 0x00400000 Flash enabled TARGET CPUTYPE MPC500 CPU type MPC800 MPC500 CPUCLOCK 20000000 the CPU clock rate used for flash timing calculation FLASH CHIPTYPE MPC555 Select MPC555 internal CDR MoneT Flash WORKSPACE 0x007FC000 use internal SRAM array B for workspace FORM...

Page 32: ...aracters type The register type GPR General purpose register SPR Special purpose register MM Absolute direct memory mapped register DMM1 DMM4 Relative direct memory mapped register IMM1 IMM4 Indirect memory mapped register addr The address offset or number of the register size The size 8 16 32 of the register The following entries are supported in the REGS part of the configuration file FILE filen...

Page 33: ...file The register definition file name type addr size gpr0 GPR 0 sp GPR 1 pc SPR 26 is SRR0 xer SPR 1 lr SPR 8 ctr SPR 9 sprg0 SPR 272 sprg1 SPR 273 sprg2 SPR 274 sprg3 SPR 275 DMM1 must be set to the internal memory map base address siumcr DMM1 0x0000 32 sypcr DMM1 0x0004 32 mstat DMM1 0x0178 16 padir DMM1 0x0950 16 papar DMM1 0x0952 16 paodr DMM1 0x0954 16 padat DMM1 0x0956 16 Now the defined re...

Page 34: ...ware Create a new directory in tornado target config e g myTarget From an existing BSP directory e g tornado target config ads860 copy the following files into the new created directory or build them from scratch Change the files so they work with your hardware config h config h sysLib c sysLib c sysALib s sysALib s romInit s romInit s Makefile Makefile From the distribution disk copy the followin...

Page 35: ... tornado target config myTarget sysALib s Add the following lines to the list of exported symbols externals globl _usrInit system initialization routine globl bdiInit bdi communication setup globl bdiCall enter debug mode Add the following routines to the end of the file bdiInit send BDI communication base address to BDI bdiInit void baseAddr the base address of the communication structure bdiInit...

Page 36: ... connection For more information about VxWorks configuration see Tornado User s Guide chapter Projects Summary for Tornado II Copy wdbBdiPktDrv c to the BSP directory Copy wdbBdiPktDrv h to the BSP directory Copy wdbBdi c to target config comps src Copy wdbBdi cdf to target config comps vxWorks Edit sysALib s as defined above use tornado add Use the VxWorks configuration utility to select BDI as t...

Page 37: ... wdbDrvIf endif WDB_COMM_TYPE WDB_COMM_BDI Install the agents communication interface and RPC transport handle tornado target config all configAll h Add the following line to the list of communication paths define WDB_COMM_NETROM 4 netrom packet device bimodal define WDB_COMM_CUSTOM 5 custom packet device bimodal define WDB_COMM_BDI 6 bdi packet device bimodal tornado target config myTarget Makefi...

Page 38: ...between the BDI and the target CPU is only possible while the target CPU is frozen In this state no interrupts are processed To transfer a complete IP frame the target CPU is frozen during a time of up to 5ms 3 3 5 1 Transferring the communciation base address The address of the communication structure is not fixed in memory and may change after every new build of the VxWorks core On the other sid...

Page 39: ... Task should have a priority equal to the target agent It waits with time out at the semaphore Then it checks the rx count field and sends the packet to the target agent if one is avail able Time out when waiting at the semaphore is used because it s possible that the BDI Idle Task gets no CPU time This may be the case when an faulty application task loops without releasing the CPU 3 3 5 3 Automat...

Page 40: ...terrupt 2 CHSTPE enabled Check Stop 3 MCIE Machine Check Interrupt 4 5 6 EXTIE External Interrupts 7 ALIE Alignment Interrupt 8 PRIE Program Interrupt 9 FPUVIE Floating Point Unavailable Interrupt 10 DECIE Decrementer Interrupt 11 12 13 SYSIE enabled System Call Interrupt used to signal a pending WDB answer 14 TRE Trace Interrupt 15 16 17 SEIE Software Emulation Interrupt 18 ITLBMSE Implementation...

Page 41: ...fic initializations like setting the timer rate are best located in the routine sysHwInit 3 4 2 Configure VxWorks Tornado 1 01 Use the VxWorks file config h to scale your VxWorks core Undefine INCLUDE_WDB and statically link all your modules with the VxWorks core Don t forget to create your tasks because they can t be created dynamically Add the following lines to the VxWorks Makefile ADDED_CFLAGS...

Page 42: ...ach system at the GDB prompt do not use the Attach menu entry because the task list cannot be read at this time If not already suspended this stops the exe cution of application code and the target CPU changes to debug mode Remember every time the application is suspended the target CPU is freezed During this time no hardware interrupts will be processed Accessing target resources e g inspecting a...

Page 43: ... enabled Maschine Check Interrupt 4 5 6 EXTIE External Interrupts 7 ALIE enabled Alignment Interrupt 8 PRIE enabled Program Interrupt 9 FPUVIE enabled Floating Point Unavailable Interrupt 10 DECIE Decrementer Interrupt 11 12 13 SYSIE enabled System Call Interrupt 14 TRE enabled Trace Interrupt 15 16 17 SEIE enabled Software Emulation Interrupt 18 ITLBMSE Implementation Specific Instructuction TLB ...

Page 44: ...D has to be connected be tween the BDI2000 and the target The cable length should not exceed 50 cm 20 Be sure to connect GTW TX to the target RX pin and GTW RX to the target TX pin Maximal input voltage to BDI2000 must not exceed 5 5V BDI TRGT MODE BDI MAIN BDI OPTION 11 1 14 2 BDI OPTION 1 NOT USED 2 GROUND 3 NOT USED 4 GROUND 5 GTW TX 6 GROUND 7 NOT USED 8 GROUND 9 NOT USED 10 GROUND 11 GTW RX 1...

Page 45: ...g your_bsp wdbFslipPktDrv c bdiHdlc h target config your_bsp wdbHdlcPktDrv h bdiHdlc c target config your_bsp wdbHdlcPktDrv c wdbFslip c target config comps src wdbHdlc c target config comps src wdbBdi cdf target config comps vxWorks Use the VxWorks configuration utility to select the fast SLIP or HDLC WDB connection Change the example driver so it runs on your hardware Only with SCC channel not w...

Page 46: ...outing The baudrate can be se lected with in the configuration file see SIO parameter The framing is fix 8 data 1 stop no parity The BDI asserts RTS and DTR when a TCP connection is established TARGET SIO 7 9600 Enable SIO via TCP port 7 at 9600 baud Warning Once SIO is enabled connecting with the setup tool to update the firmware will fail In this case either disable SIO first or disconnect the B...

Page 47: ...ses Load a code file from any host Start Stop program execution Programming and Erasing Flash memory During normal debugging with Tornado there is no need for connecting to the Telnet server The Telnet interface may be useful during the first installation of the bdiWind system or in case of special debug needs e g setting breakpoints on variable access Note The Telnet command RESET does only reset...

Page 48: ...ack buffer BOOT reset the BDI and reload the configuration RESET HALT RUN time reset the target system change startup mode BREAK SOFT HARD display or set current breakpoint mode GO pc set PC and start target system TI pc trace on instuction single step TC pc trace on change of flow HALT force target to enter debug mode BI from to count set instruction hardware breakpoint CI id clear instruction ha...

Page 49: ... 19 200 38 400 57 600 115 200 Data Bits 8 Parity Bits none Stop Bits 1 Network Interface 10 BASE T Serial Transfer Rate between BDI and Target up to 16 Mbit s Supported target voltage 1 8 5 0 V 3 0 5 0 V with Rev A B Operating Temperature 5 C 60 C Storage Temperature 20 C 65 C Relative Humidity noncondensing 90 rF Size 190 x 110 x 35 mm Weight without cables 420 g Host Cable length RS232 2 5 m Spe...

Page 50: ... BDI2000 MPC8xx MPC5xx User Manual 50 Copyright 1997 2007 by ABATRON AG Switzerland V 1 38 5 Environmental notice Disposal of the equipment must be carried out at a designated disposal site 6 Declaration of Conformity CE ...

Page 51: ...ing but not limited loss of profit special incidental consequential or other similar claims ABATRON Switzerland specifically disclaims all other warranties expressed or implied including but not limited to implied warranties of merchantability and fitness for particular purposes with respect to defects in the diskette cable BDI2000 and documentation and the program license granted here in includin...

Page 52: ...ou to do this Channel Select the communication port where the BDI2000 is connected during this setup session Baudrate Select the baudrate used to communicate with the BDI2000 loader during this setup session Connect Click on this button to establish a connection with the BDI2000 loader Once connected the BDI2000 remains in loader mode until it is restarted or this dialog box is closed Current Pres...

Page 53: ...000 after every start up Configuration file Enter the full path and name of the configuration file e g D tornado target config bdi ads860bdi cnf For information about the syntax of the configuration file see the bdiWind User manual This name is transmitted to the TFTP server when reading the configuration file Transmit Click on this button to store the configuration in the BDI2000 flash memory In ...

Page 54: ...tion port Com 1 Com 4 is selected Problem No working with the target system loading firmware is ok Possible reasons Wrong pin assignment BDM JTAG connector of the target system see chapter 2 Target system initialization is not correctly enter an appropriate target initialization list An incorrect IP address was entered BDI2000 configuration BDM JTAG signals from the target system are not correctly...

Page 55: ...on please proceed according to the following steps Observe precautions for handling Electrostatic sensitive device Unplug the cables before opening the cover Use exact fuse replacement Microfuse MSF 1 6 AF 1 2 3 BDI 2000 A A A A b b b b a a a a t t t t r r r r o o o o n n n n A A A A G G G G S S S S w w w w i i i i s s s s s s s s M M M M a a a a d d d d e e e e 1 1 Unplug the cables BDI TRGT MODE...

Page 56: ...s align with the holes in the front panel elastic sealing Reinstallation back panel 5 2 Push carefully the front panel and the red elastig sealing on the casing Check that the LEDs align with the holes in the front panel and that the 5 3 Mount the screws do not overtighten it 5 4 Mount the two plastic caps that cover the screws 5 5 Plug the cables position of the sealing is as shown in the figure ...

Page 57: ...bdiWindfor Tornado BDI2000 MPC8xx MPC5xx User Manual 57 Copyright 1997 2007 by ABATRON AG Switzerland V 1 38 D Trademarks All trademarks are property of their respective holders ...

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