Aaeon GENE-KBU6 User Manual Download

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Last Updated: June 30, 2017

GENE-KBU6

3.5” Subcompact Board

User’s Manual 1

Summary of Contents for GENE-KBU6

Page 1: ...Last Updated June 30 2017 GENE KBU6 3 5 Subcompact Board User s Manual 1st Ed...

Page 2: ...in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may resul...

Page 3: ...trademark of Microsoft Corp Intel Pentium Celeron and Xeon are registered trademarks of Intel Corporation Core Atom are trademarks of Intel Corporation ITE is a trademark of Integrated Technology Expr...

Page 4: ...ur product please make sure the following items have been shipped Item Quantity GENE KBU6 with heat spreader 1 Product DVD with User s Manual in pdf and drivers 1 If any of these items are missing or...

Page 5: ...detailed descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions i...

Page 6: ...ransient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed nea...

Page 7: ...sion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and...

Page 9: ...Preface IX 3 5 Subcompact Board GENE KBU6 China RoHS Requirements CN AAEON Main Board Daughter Board Backplane Pb Hg Cd Cr VI PBB PBDE O SJ T 11363 2006 X SJ T 11363 2006...

Page 10: ...enyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s p...

Page 11: ...e Selection JP3 13 2 5 4 LVDS Port Operating VDD Selection JP4 13 2 5 5 mSATA Mini Card Operating VCC Selection JP5 14 2 5 6 Touch Screen 4 5 8 Wire Selection JP6 14 2 5 7 Auto Power Button Enable Dis...

Page 12: ...2 0 Port CN20 31 2 6 17 USB 2 0 Port CN21 31 2 6 18 Audio I O Port CN22 32 2 6 19 Touchscreen Connector CN23 33 2 6 20 Digital I O Port CN24 35 2 6 21 COM Port 1 CN25 35 2 6 22 COM Port 4 CN26 36 2 6...

Page 13: ...1 Serial Port Configuration 66 3 12 Serial Port Configuration 67 3 13 USB Configuration 68 3 14 Digital IO Port Configuration 69 3 15 Power Management 70 3 16 Compatibility Support Module Configuratio...

Page 14: ...Programming 89 A 1 Watchdog Timer Registers 90 A 2 Watchdog Sample Program 91 Appendix B I O Information 94 B 1 I O Address Map 95 B 2 Memory Address Map 97 B 3 IRQ Mapping Chart 99 Appendix C Electri...

Page 15: ...Subcompact Board GENE KBU6 D 2 DI O Programming 106 D 3 Digital I O Register 107 D 4 Digital I O Sample Program 108 Appendix E List of Mating Connectors and Cables 111 E 1 Electrical Specifications fo...

Page 16: ...3 5 Subcompact Board GENE KBU6 Chapter 1 Chapter 1 Product Specifications...

Page 17: ...sor Memory Type DDR4 1866 2133 SODIMM x1 Max Memory Capacity Up to 16 GB BIOS UEFI Wake On LAN Yes Watchdog Timer 255 levels Power Requirement 12 V or 9 36 V Power Supply Type AT ATX Power Consumption...

Page 18: ...O Ethernet Intel I210 10 100 1000Base RJ 45 x 2 supports EtherCAT Audio High Definition Audio Interface USB USB 3 0 x 4 USB 2 0 x 2 Serial Port RS 232 x 1 RS 232 422 485 x 3 HDD Interface SATA 3 0 Gb...

Page 19: ...3 5 Subcompact Board GENE SKU6 Chapter 2 Chapter 2 Hardware Information...

Page 20: ...Chapter 2 Hardware Information 5 3 5 Subcompact Board GENE KBU6 2 1 Dimensions Component Side Component Side...

Page 21: ...Chapter 2 Hardware Information 6 3 5 Subcompact Board GENE KBU6 Solder Side with heat spreader Solder Side unit mm...

Page 22: ...Chapter 2 Hardware Information 7 3 5 Subcompact Board GENE KBU6 Cooler Option Part Number 17592SKU60...

Page 23: ...Chapter 2 Hardware Information 8 3 5 Subcompact Board GENE KBU6 2 2 Jumpers and Connectors Component Side...

Page 24: ...Chapter 2 Hardware Information 9 3 5 Subcompact Board GENE KBU6 2 3 Assembly Options Option 1...

Page 25: ...Chapter 2 Hardware Information 10 3 5 Subcompact Board GENE KBU6 Option 2...

Page 26: ...Chapter 2 Hardware Information 11 3 5 Subcompact Board GENE KBU6 2 4 Block Diagram...

Page 27: ...CMOS Jumper JP2 LVDS Port Backlight Inverter VCC Selection JP3 LVDS Port Backlight Lightness Control Mode Selection JP4 LVDS Port Operating VDD Selection JP5 mSATA Mini Card Operating VCC Selection J...

Page 28: ...1 Normal Default Clear CMOS 2 5 2 LVDS Port Backlight Inverter VCC Selection JP2 12V 5V Default 2 5 3 LVDS Port Backlight Lightness Control Mode Selection JP3 VR Mode Default PWM Mode 2 5 4 LVDS Port...

Page 29: ...ower on the system 2 5 8 COM3 Pin8 Function Selection JP8 12V Ring Default 5V 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1...

Page 30: ...5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 6 5 6 1 2 3 4 5 6 1 2 3 4 5 6 5 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3...

Page 31: ...DP Port CN6 LVDS Port CN7 LVDS Port Inverter Backlight Connector CN8 SPI Debug Port CN9 LAN RJ 45 Port1 CN10 LAN RJ 45 Port2 CN11 Mini Card Slot Full Mini Card CN12 Micro SIM Card Socket CN13 Mini Ca...

Page 32: ...hapter 2 Hardware Information 17 3 5 Subcompact Board GENE KBU6 CN28 COM Port 3 CN29 LPC Port CN30 External Power Input CN32 5VSB Output w SMBus CN33 External 5VSB Input CN35 BIO Connector CN36 CPU FA...

Page 33: ...3V PWR 3 3V 2 GND GND 2 6 2 DVI I Digital and Analog CN3 Pin Pin Name Signal Type Signal Level 1 DVI_D2 OUT 2 DVI_D2 OUT 3 GND GND 4 VGA_DDC_CLK I O 5 VGA_DDC_DAT I O 6 SCL I O 7 SDA I O 8 VGA_VSYNC O...

Page 34: ...LK OUT C1 VGA_RED OUT C2 VGA_GREEN OUT C3 VGA_BLUE OUT C4 VGA_HSYNC OUT 2 6 3 DP Port CN5 Pin Pin Name Signal Type Signal Level 1 DP_D0 DIFF 2 GND GND 3 DP_D0 DIFF 4 DP_D1 DIFF 5 GND GND 6 DP_D1 DIFF...

Page 35: ...GND 20 5V I O 5V 2 6 4 LVDS Port CN6 LVDS LCD_PWR can be set to 3 3V or 5V by JP4 Pin Pin Name Signal Type Signal Level 1 BKL_ENABLE OUT 2 BKL_CONTROL OUT 3 LCD_PWR PWR 3 3V 5V 4 GND GND 5 LVDS_A_CLK...

Page 36: ..._DA3 DIFF 17 DDC_DATA I O 3 3V 18 DDC_CLK I O 3 3V 19 LVDS_DB0 DIFF 20 LVDS_DB0 DIFF 21 LVDS_DB1 DIFF 22 LVDS_DB1 DIFF 23 LVDS_DB2 DIFF 24 LVDS_DB2 DIFF 25 LVDS_DB3 DIFF 26 LVDS_DB3 DIFF 27 LCD_PWR PW...

Page 37: ...GND 5 BKL_ENABLE OUT 5V LVDS BKL_PWR can be set to 5V or 12V by JP2 LVDS BKL_CONTROL can be set by JP3 2 6 6 SPI Debug Port CN8 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CL...

Page 38: ...MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 6 8 LAN RJ 45 Port2 CN10 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 2 6 9...

Page 39: ...PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 15 GND GND 16 UIM_VPP PWR 17 NC 18 GND GND 19 NC 20 W_DISABLE OUT 3 3V 21...

Page 40: ...SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB PWR 3 3V 40 GND GND 41 3 3VSB PWR 3 3V 42 NC 43 GND GND 44...

Page 41: ...pe Signal Level 1 UIM_PWR PWR 2 UIM_RST IN 3 UIM_CLK IN 4 NC 5 GND GND 6 UIM_VPP PWR 7 UIM_DATA I O 8 NC 2 6 11 Mini Card Slot Half Mini Card CN13 Pin Pin Name Signal Type Signal Level 1 PCIE_WAKE IN...

Page 42: ...ISABLE OUT 3 3V 21 GND GND 22 PCIE_RST OUT 3 3V 23 PCIE_RX mSATA_RX DIFF 24 3 3VSB PWR 3 3V 25 PCIE_RX mSATA_RX DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX mS...

Page 43: ...ND 44 NC 45 NC 46 NC 47 NC 48 1 5V PWR 1 5V 49 NC 50 GND GND 51 NC 52 3 3VSB PWR 3 3V CN13 can be selected for Mini Card or mSATA by changing BIOS 2 6 12SATA Port 1 CN14 Pin Pin Name Signal Type Signa...

Page 44: ...nal Level 1 5V PWR 5V 2 GND GND 2 6 14USB 3 0 Ports CN18 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 USB_SSRX DIFF 6 USB_SSRX DIFF 7 GND GND 8 USB_SSTX DI...

Page 45: ..._SSTX DIFF 18 USB_SSTX DIFF 2 6 15USB 3 0 Ports CN19 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 USB_SSRX DIFF 6 USB_SSRX DIFF 7 GND GND 8 USB_SSTX DIFF 9...

Page 46: ...16 GND GND 17 USB_SSTX DIFF 18 USB_SSTX DIFF 2 6 16USB 2 0 Port CN20 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 5 GND GND 2 6 17USB 2 0 Port CN21 Pin Pin...

Page 47: ...D 2 6 18Audio I O Port CN22 Pin Pin Name Signal Type Signal Level 1 MIC_L IN 2 MIC_R IN 3 GND_AUDIO GND 4 LINE_L_IN IN 5 LINE_R_IN IN 6 GND_AUDIO GND 7 LEFT_OUT OUT 8 GND_AUDIO GND 9 RIGHT_OUT OUT 10...

Page 48: ...IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC 5 Wire Pin Pin Name Signal Type Signal Level GND 1 9 1 9 1 9 TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE GND TOP...

Page 49: ...Type Signal Level 1 GND GND 2 TOP EXCITE IN 3 BOTTOM EXCITE IN 4 LEFT EXCITE IN 5 RIGHT EXCITE IN 6 TOP SENSE IN 7 BOTTOM SENSE IN 8 LEFT SENSE IN 9 RIGHT SENSE IN GND 1 9 1 9 TOP EXCITE BOTTOM EXCIT...

Page 50: ...e Signal Level 1 DIO0 I O 5V 2 DIO1 I O 5V 3 DIO2 I O 5V 4 DIO3 I O 5V 5 DIO4 I O 5V 6 DIO5 I O 5V 7 DIO6 I O 5V 8 DIO7 I O 5V 9 5V PWR 5V 10 GND GND 2 6 21COM Port 1 CN25 Pin Pin Name Signal Type Sig...

Page 51: ...OUT 9V 5 TX OUT 9V 6 CTS IN 7 DTR OUT 9V 8 RI IN 9 GND GND 2 6 22 COM Port 4 CN26 RS 232 Pin Pin Name Signal Type Signal Level 1 DCD IN 2 DSR IN 3 RX IN 4 RTS OUT 5V 5 TX OUT 5V 6 CTS IN 7 DTR OUT 5V...

Page 52: ...nal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS 485 Pin Pin Name Signal Type Signal Level 1 RS485_D I O 5V 2 NC RS422_TX NC...

Page 53: ...12V PWR 5V 12V 9 GND GND COM4 RS 232 422 485 can be set by BIOS setting Default is RS 232 Pin 8 function can be set by JP11 2 6 23 COM Port 2 CN27 RS 232 Pin Pin Name Signal Type Signal Level 1 DCD I...

Page 54: ...2V 9 GND GND RS 422 Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS 485 RS422_TX NC RS422_TX NC...

Page 55: ...NC 3 RS485_D I O 5V 4 NC 5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND COM2 RS 232 422 485 can be set by BIOS setting Default is RS 232 Pin 8 function can be set by JP9 2 6 24 COM Port 3 CN28 RS 232...

Page 56: ...I 5V 12V IN PWR 5V 12V 9 GND GND RS 422 Pin Pin Name Signal Type Signal Level 1 RS422_TX OUT 5V 2 NC 3 RS422_TX OUT 5V 4 NC 5 RS422_RX IN 6 NC 7 RS422_RX IN 8 NC 5V 12V PWR 5V 12V 9 GND GND RS422_TX N...

Page 57: ...NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND COM3 RS 232 422 485 can be set by BIOS setting Default is RS 232 Pin 8 function can be set by JP8 2 6 25 LPC Port CN29 Pin Pin Name Signal Type Signal Le...

Page 58: ...10 LDRQ0 IN 11 LDRQ1 IN 12 SERIRQ I O 3 3V 2 6 26 External Power Input CN30 Pin Pin Name Signal Type Signal Level 1 12V PWR 9 36V or 12V 2 GND GND 2 6 27 5VSB Output w SMBus CN32 Pin Pin Name Signal...

Page 59: ...nal 5VSB Input CN33 Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 3 3V 2 GND GND 3 5VSB PWR 5V 2 6 29 BIO Connector CN35 Pin Pin Name Signal Type Signal Level 1 12V_Dual PWR 12V 2 GND GND 3 GND GN...

Page 60: ...CIE2_TX I O 13 PCIE2_RX I O 14 GND GND 15 GND GND 16 PS_ON OUT 17 NC 18 NC 19 5V_Dual PWR 5V 20 5V_Dual PWR 5V 21 5V_Dual PWR 5V 22 5V_Dual PWR 5V 23 PCIE_CLK OUT 24 PLT_RST OUT 25 PCIE_CLK OUT 26 GND...

Page 61: ...3 NC 44 USB 3 0_TX I O 45 GND GND 46 USB 3 0_TX I O 47 USB 2 0_D I O 48 GND GND 49 USB 2 0_D I O 50 USB 3 0_RX I O 51 GND GND 52 USB 3 0_RX I O 53 SMB_CLK I O 54 GND GND 55 SMB_DATA I O 56 PCIE_WAKE I...

Page 62: ...I O 68 SERIRQ I O 69 LPC_AD2 I O 70 NC 71 LPC_AD3 I O 72 GPIO I O 73 GND GND 74 Audio_GND GND 75 LPC_CLK OUT 76 Audio_OUT_L OUT 77 PME IN 78 Audio_OUT_R OUT 79 GND GND 80 GND GND 2 6 30 CPU Fan CN36 P...

Page 63: ...3 5 Subcompact Board GENE SKU6 Chapter 3 Chapter 3 AMI BIOS Setup...

Page 64: ...n the CMOS memory and BIOS NVRAM If system configuration is not found or system configuration data error is detected system will load optimized default and re boot with this default system configurati...

Page 65: ...the power is turned off Entering Setup Power on the computer and press Del or ESC immediately This will allow you to enter Setup The function for each interface can be found below Main Date and time c...

Page 66: ...Chapter 3 AMI BIOS Setup 51 3 5 Subcompact Board GENE KBU6 3 3 Setup submenu Main...

Page 67: ...Chapter 3 AMI BIOS Setup 52 3 5 Subcompact Board GENE KBU6 3 4 Setup submenu Advanced...

Page 68: ...optimized for Hyper Threading Technology Active Processor Cores All Optimal Default Failsafe Default 1 Number of cores to enable in each processor package Intel VMX Virtualization Technology Disabled...

Page 69: ...Enabled Optimal Default Failsafe Default Allows more than two frequency ranges to be supported Turbo Mode Disabled Enabled Optimal Default Failsafe Default Enable Disable processor Turbo Mode requires...

Page 70: ...ty Device TCG EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Opti...

Page 71: ...Failsafe Default TCG_1_2 Select the TCG2 Spec Version Support TCG_1_2 the Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win10 or later Physical Presence Spec Ver...

Page 72: ...ailsafe Default Disabled Enable or disable SATA Device SATA Mode AHCI Mode Optimal Default Failsafe Default RAID Mode Determines how SATA controller s operate Port 0 Disabled Enabled Optimal Default F...

Page 73: ...Chapter 3 AMI BIOS Setup 58 3 5 Subcompact Board GENE KBU6 3 6 Hardware Monitor Smart Fan Enabled Enable or Disable Smart Fan Disabled...

Page 74: ...6 3 7 Smart Fan Mode Configuration Options summary Fan Mode Manual Duty Auto Duty Optimal Default Failsafe Default Smart Fan Mode Select Duty Cycle Auto fan speed control Fan speed will follow differe...

Page 75: ...pter 3 AMI BIOS Setup 60 3 5 Subcompact Board GENE KBU6 Options summary Manual Duty Mode 60 Optimal Default Failsafe Default Manual mode fan control user can write expected duty cycle PWM fan type 1 1...

Page 76: ...mal Default Failsafe Default Chassis Temperature CPU Chassis Temperature PCH Select monitor thermal source Temperature of Start 30 Optimal Default Failsafe Default Temperature Of Start Temperature Of...

Page 77: ...Chapter 3 AMI BIOS Setup 62 3 5 Subcompact Board GENE KBU6 Slope PWM 0 PWM 1 PWM Optimal Default Failsafe Default 2 PWM 4 PWM 8 PWM 16 PWM 32 PWM 64 PWM Slope PWM...

Page 78: ...Chapter 3 AMI BIOS Setup 63 3 5 Subcompact Board GENE KBU6 3 8 SIO Configuration...

Page 79: ...erial Port Configuration Options summary Use This Device Disabled Enabled Optimal Default Failsafe Default En Disable Serial Port COM Possible Use Automatic Settings Optimal Default Failsafe Default I...

Page 80: ...ptions summary Use This Device Disabled Enabled Optimal Default Failsafe Default En Disable Serial Port COM Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8 IRQ 3 IO 3F8 IRQ 4 M...

Page 81: ...tions summary Use This Device Disabled Enabled Optimal Default Failsafe Default En Disable Serial Port COM Possible Use Automatic Settings Optimal Default Failsafe Default IO 3E8 IRQ 11 IO 2E8 IRQ 11...

Page 82: ...tions summary Use This Device Disabled Enabled Optimal Default Failsafe Default En Disable Serial Port COM Possible Use Automatic Settings Optimal Default Failsafe Default IO 2E8 IRQ 11 IO 3E8 IRQ 11...

Page 83: ...ration Options summary Legacy USB Support Enabled Optimal Default Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support When enabled USB can be functional in legacy environment li...

Page 84: ...3 5 Subcompact Board GENE KBU6 3 14 Digital IO Port Configuration Options summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output le...

Page 85: ...ptimal Default Failsafe Default Enabled Configure power mode for power saving function Restore on Power Loss Last State Optimal Default Failsafe Default Power On Power Off Select power state when powe...

Page 86: ...5 Subcompact Board GENE KBU6 Resume from PCIE Disabled Enabled Optimal Default Failsafe Default Enable Disable Resume from PCIE Resume from LAN RI Disabled Enabled Optimal Default Failsafe Default Ena...

Page 87: ...ptimal Default Failsafe Default Legacy only UEFI only This option controls Legacy UEFI ROMs priority Storage Do not launch UEFI Legacy Optimal Default Failsafe Default Controls the execution of UEFI a...

Page 88: ...Chapter 3 AMI BIOS Setup 73 3 5 Subcompact Board GENE KBU6 3 17 Setup submenu Chipset...

Page 89: ...uration Options summary Max TOLUD Dynamic Optimal Default Failsafe Default 1 GB 1 25 GB 1 5 GB 1 75 GB 2 GB 2 25 GB 2 5 GB 2 75 GB 3 GB 3 25 GB 3 5 GB Maximum Value of TOLUD Dynamic assignment would a...

Page 90: ...al Default Failsafe Default DVI CRT DP LVDS Select the Video Device which will be activated during POST This has no effect if external graphic present Secondary boot display selection will appear base...

Page 91: ...e 640x480 18bit 60Hz 800x480 18bit 60Hz 800x600 18bit 60Hz 1024x600 18bit 60Hz 1024x768 18bit 60Hz Optimal Default Failsafe Default 1024x768 24bit 60Hz 1280x768 24bit 60Hz 1280x1024 48bit 60Hz 1366x76...

Page 92: ...light Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50 60 70 80 Optimal Default Failsafe Default 90 100 Select backlight cont...

Page 93: ...nditionally disabled Enabled HDA will be unconditionally enabled Auto HDA will be enabled if present disabled otherwise PCI Express Root Port 5 Enabled Optimal Default Failsafe Default Disabled Contro...

Page 94: ...ht these items and press Enter a dialog box appears which lets you enter a password You can enter no more than six letters or numbers Press Enter after you have typed in the password A second dialog b...

Page 95: ...KBU6 3 23 Setup Submenu Boot Options summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default En Disable showing boot logo Launch PXE OpROM Disabled Optimal Default Failsafe Default Enable...

Page 96: ...Chapter 3 AMI BIOS Setup 81 3 5 Subcompact Board GENE KBU6 BBS Priorities...

Page 97: ...Chapter 3 AMI BIOS Setup 82 3 5 Subcompact Board GENE KBU6 3 242 Setup Submenu Exit...

Page 98: ...3 5 Subcompact Board GENE KBU6 Chapter 4 Chapter 4 Drivers Installation...

Page 99: ...the Step1 Chipset folder followed by SetupChipset exe 2 Follow the instructions 3 Drivers will be installed automatically Step 2 Install Graphics Drivers 1 Open the Step2 VGA folder and select your OS...

Page 100: ...d by Setup exe 2 Follow the instructions 3 Drivers will be installed automatically Step 6 Install TPM 2 0 Driver Windows 7 only 1 Open the Step6 TPM 2 0 folder followed by the msu file 2 Follow the in...

Page 101: ...apter 4 Driver Installation 86 3 5 Subcompact Board GENE KBU6 Step 8 Install Serial Port Drivers For Windows 7 1 Change User Account Control settings to Never notify 2 Reboot and log in as administrat...

Page 102: ...Board GENE KBU6 3 Run patch bat as administrator For Windows 8 10 1 Click on the Step8 Serial Port Driver Optional folder and select your OS 2 Open the setup exe file in the folder 3 Follow the instru...

Page 103: ...forms it is recommended to install Windows 7 through a SATA bus eg SATA DVD ROM or patch the xHCI driver onto an installation media for Windows 7 More information can be found in the links below Windo...

Page 104: ...3 5 Subcompact Board GENE KBU6 Appendix A Appendix A Watchdog Timer Programming...

Page 105: ...le 0x00 7 1 Enable Disable time out output via WDTRST 0 Disable 1 Enable Pulse Width 0x05 0 1 01 Width of Pulse signal 00 1ms do not use 01 25ms 10 125ms 11 5s Pulse width is must longer then 16ms Sig...

Page 106: ...register define PSWidthBit 0x00 WDTRST Pulse width Bit0 1 define PSWidthVal 0x01 25ms for WDTRST pulse define PolarityBit 0x02 WDTRST Signal polarity Bit2 define PolarityVal 0x00 Low active for WDTRS...

Page 107: ...ue 1 WDTSetBit TimerReg EnableBit 1 else WDTSetBit TimerReg EnableBit 0 VOID WDTParameterSetting byte Counter BOOLEAN Unit Watchdog Timer counter setting WDTWriteByte CounterReg Counter WDT counting u...

Page 108: ...Byte byte Register byte Value IOWriteByte WDTAddr Register Value byte WDTReadByte byte Register return IOReadByte WDTAddr Register VOID WDTSetBit byte Register byte Bit byte Val byte TmpValue TmpValue...

Page 109: ...3 5 Subcompact Board GENE KBU6 Appendix B Appendix B I O Information...

Page 110: ...Appendix B I O Information 95 3 5 Subcompact Board GENE KBU6 B 1 I O Address Map...

Page 111: ...Appendix B I O Information 96 3 5 Subcompact Board GENE KBU6...

Page 112: ...Appendix B I O Information 97 3 5 Subcompact Board GENE KBU6 B 2 Memory Address Map...

Page 113: ...Appendix B I O Information 98 3 5 Subcompact Board GENE KBU6...

Page 114: ...Appendix B I O Information 99 3 5 Subcompact Board GENE KBU6 B 3 IRQ Mapping Chart...

Page 115: ...Appendix B I O Information 100 3 5 Subcompact Board GENE KBU6...

Page 116: ...3 5 Subcompact Board GENE KBU6 Appendix C Appendix C Electrical Specifications for I O Ports...

Page 117: ...3V 5V 3 3V 2A or 5V 2A LVDS Port Inverter Backlight Connector CN7 5V 12V 5V 1 5A or 12V 1 5A Mini Card Slot Full Mini Card CN11 3 3VSB 1 5V 3 3V 1 1A 1 5V 0 375A Mini Card Slot Half Mini Card CN13 3 3...

Page 118: ...mpact Board GENE KBU6 Audio I O Port CN22 5V 5V 1A Digital IO Port CN24 5V 5V 1A COM Port 4 CN26 5V 12V 5V 0 5A or 12V 0 5A COM Port 2 CN27 5V 12V 5V 0 5A or 12V 0 5A COM Port 3 CN28 5V 12V 5V 0 5A or...

Page 119: ...3 5 Subcompact Board GENE KBU6 Appendix D Appendix D Digital I O Ports...

Page 120: ...l Input Output Pin Electrical Specification Pin Type Input Threshold Voltage Output Voltage Note Low High Low High DIO0 I O 0 8 2 0 0 5 DIO1 I O 0 8 2 0 0 5 DIO2 I O 0 8 2 0 0 5 DIO3 I O 0 8 2 0 0 5 D...

Page 121: ...res to complete its configuration and the AAEON initial DI O program is also attached based on which you can develop customized program to fit your application There are three steps to complete the co...

Page 122: ...ction 0x06 0xA0 2 DIO3 Direction 0x06 0xA0 3 DIO4 Direction 0x06 0xA0 4 DIO5 Direction 0x06 0xA0 5 DIO6 Direction 0x06 0xA0 6 DIO7 Direction 0x06 0xA0 7 DIO0 Output Level 0x06 0xA1 0 0 low 1 high DIO1...

Page 123: ...fine InputPin 0x00 define OutputPin 0x01 define OutputReg 0xA1 0 low 1 high define StatusReg 0xA2 0 low 1 high define PinLow 0x00 define PinHigh 0x01 define Pin0Bit 0x00 define Pin1Bit 0x01 define Pin...

Page 124: ...alue ConfigDioMode PinBit OutputPin SIOBitSet DIOLDN OutputReg PinBit Value VOID SIOEnterMBPnPMode IOWriteByte SIOIndex 0x87 IOWriteByte SIOIndex 0x87 VOID SIOExitMBPnPMode IOWriteByte SIOIndex 0xAA V...

Page 125: ...xitMBPnPMode Boolean SIOBitRead byte LDN byte Register byte BitNum Byte TmpValue SIOEnterMBPnPMode SIOSelectLDN LDN IOWriteByte SIOIndex Register TmpValue IOReadByte SIOData TmpValue 1 BitNum SIOExitM...

Page 126: ...3 5 Subcompact Board GENE KBU6 Appendix E Appendix E List of Mating Connectors and Cables...

Page 127: ...1C CN6 LVDS Connector HIROSE DF13 30DS 1 25C N A N A CN7 LVDS Inverter Connector JST PHR 5 N A N A CN14 SATA Connector Molex 88750 5318 SATA Cable 1709070500 CN15 5Vout Connector JST PHR 2 2 Pins For...

Page 128: ...rt 4 Connector Molex 51021 0900 Serial Port Cable 1701090150 CN27 COM Port 2 Connector Molex 51021 0900 Serial Port Cable 1701090150 CN28 COM Port 3 Connector Molex 51021 0900 Serial Port Cable 170109...

Page 129: ...Appendix E Mating Connectors and Cables 114 3 5 Subcompact Board GENE KBU6 CN36 CPU Fan Connector Molex 22 01 2035 N A N A...

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