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1.

General description

The PNX2000 is a companion IC for use with the Nexperia™ 

1

 digital video home 

entertainment engines such as PNX8526 and PNX8550.

The PNX2000 is always used in combination with the PNX3000.

PNX2000 is intended for mid to high-end analog and hybrid TV sets, performing input 
decoding of single stream analog audio and single stream analog video signals. In 
addition, the PNX2000 is used for decoding and presentation of all audio output streams 
in the system. 

Figure 1

 shows a block diagram of the device.

2.

Features

Detection of PAL, NTSC or SECAM, and various 1f

H

 and 2f

H

 component video input 

sources.

Full support for 1f

H

 and 2f

H

 video sources; progressive and interlaced.

Decoding for global VBI Standards (WST, WSS, VPS, CC, VITC).

ITU-656 output interface.

Global multi-standard audio demodulation and decoding.

Dolby Pro Logic II™ 

2

 multi-channel audio decoding and post-processing.

Advanced fully programmable audio post-processing functions, including 
psychoacoustic spatial algorithms for optimal loudspeaker matching.

3.

Applications

Analog TV receivers.

Hybrid TV receivers.

DVD recorders.

VCRs.

PNX2000

Audio video input processor

Rev. 03 – 23 August 2004

Product data

1.

Nexperia is a trademark of 

Koninklijke Philips Electronics N.V.

2.

Dolby is a trademark of Dolby Laboratories

Summary of Contents for Nexperia PNX2000

Page 1: ... of PAL NTSC or SECAM and various 1fH and 2fH component video input sources Full support for 1fH and 2fH video sources progressive and interlaced Decoding for global VBI Standards WST WSS VPS CC VITC ITU 656 output interface Global multi standard audio demodulation and decoding Dolby Pro Logic II 2 multi channel audio decoding and post processing Advanced fully programmable audio post processing f...

Page 2: ...iption Version PNX2000HL LQFP144 plastic low profile quad flat package 144 leads body 20 20 1 4 mm SOT486 1 Fig 1 Block diagram mce559 I2C BUS I2C bus audio data SIF or L R video data CVBS Y C YUV 54 MHz clock 27 Msps or 54 Msps VIDDEC HSYNC HSYNC VSYNC I2D DLINK1 DLINK3 DLINK2 GTU INT 13 5 MHz or 27 MHz Xtal 6 I2S bus outputs 6 I2S bus inputs DCU ITU 656 ITU 656 1fH or 2fH 10 bit data BCU PNX2000...

Page 3: ...tables Fig 2 Pin configuration PNX2000HL 108 37 72 144 109 73 1 36 001aaa287 Table 2 Acronym description Acronym Description 3V 3 3 V LVCMOS 5VT 5 V tolerant inputs Z 3 state TTL TTL logic TTL H TTL with hysteresis CMOS CMOS logic IA Input Analog ID Input Digital OD Output Digital OA Output Analog IOA I O Analog IOD I O Digital GA Ground Analog SA Supply Analog SD Supply Digital OSCIN Crystal Osci...

Page 4: ...alog differential strobe link 3 positive termination 15 DLINK3SN IA analog differential strobe link 3 negative termination 16 VDDD I2D SD I2D digital 1 8 V supply voltage 17 I2C_ADR ID I2C bus address select internal pull down TTL 5VT 18 HSYNCFBL1 IA horizontal sync external fastblanking signal from SCART 19 HSYNCFBL2 IA horizontal sync external fastblanking signal from SCART 20 HVINFO OD horizont...

Page 5: ...o output state 3 CMOS Z 59 VSSE 3 3 V ground 60 DVO_DATA_4 OD digital video output state 4 CMOS Z 61 DVO_DATA_5 OD digital video output state 5 CMOS Z 62 DVO_DATA_6 OD digital video output state 6 CMOS Z 63 DVO_DATA_7 OD digital video output state 7 CMOS Z 64 DVO_DATA_8 OD digital video output state 8 CMOS Z 65 DVO_DATA_9 OD digital video output state 9 CMOS Z 66 VDDE 3 3 V supply voltage 67 VDDI ...

Page 6: ...I 1 8 V supply voltage 98 VSS 1 8 V ground 99 VSSE 3 3 V ground 100 VSS ADAC GD audio DAC 1 8 V digital ground 101 VDDD ADAC SD audio DAC 1 8 V digital supply voltage 102 VDDA ADAC SA audio DAC 3 3 V supply voltage 103 ADAC1_P SA Positive analog reference derived via emitter follower from PNX3000 V_SND pin 104 ADAC1 OA analog audio output 1 105 ADAC1_N GA Negative analog reference star connected a...

Page 7: ... 8 126 ADAC8_P SA Positive analog reference derived via emitter follower from PNX3000 V_SND pin 127 ADAC9_P SA Positive analog reference derived via emitter follower from PNX3000 V_SND pin 128 ADAC9 OA analog audio output 9 129 ADAC9_N GA Negative analog reference star connected at PNX3000 130 ADAC10_N GA Negative analog reference star connected at PNX3000 131 ADAC10 OA analog audio output 10 132 ...

Page 8: ...nalog differential data link 1 negative termination DLINK1SP 4 IA analog differential strobe link 1 positive termination DLINK1SN 5 IA analog differential strobe link 1 negative termination DLINK2DP 7 IA analog differential data link 2 positive termination DLINK2DN 8 IA analog differential data link 2 negative termination DLINK2SP 9 IA analog differential strobe link 2 positive termination DLINK2S...

Page 9: ...itive analog reference derived via emitter follower from PNX3000 V_SND pin ADAC5_N 117 GA Negative analog reference star connected at PNX3000 ADAC6_P 120 SA Positive analog reference derived via emitter follower from PNX3000 V_SND pin ADAC6_N 118 GA Negative analog reference star connected at PNX3000 ADAC7_P 121 SA Positive analog reference derived via emitter follower from PNX3000 V_SND pin ADAC7...

Page 10: ...annel 3 CMOS I2S_SCK_SYS 79 IOD I2S bus system bit clock TTL H CMOS I2S_WS_SYS 78 IOD I2S bus system word select TTL H CMOS ADAC_CLK 89 OD Used for 128 fs or 256 fs clock output to external audio DAC CMOS Table 8 VIDDEC pins Symbol Pin Type Description HVINFO 20 OD horizontal and vertical sync information to PNX3000 CMOS HSYNCFBL1 18 IA horizontal sync external fastblanking signal from SCART HSYNC...

Page 11: ... TTL H 5VT TRST_N 1 96 ID JTAG reset active low TTL H 5VT TMS 95 ID JTAG test mode select TTL H 5VT Table 11 I2C bus pins Symbol Pin Type Description I2C_SDA 27 IOD I2C bus data TTL Z 5VT I2C_SCL 26 IOD I2C bus clock TTL Z 5VT I2C_ADR 17 ID I2C bus address select internal pull down TTL 5VT Table 12 Clock pins Symbol Pin Type Description MPIFCLK 31 OD 13 5 MHz or 27 MHz to PNX3000 CMOS DCLK 47 OD r...

Page 12: ...Ms VSSD I2D 1 GD I2D digital ground VDDD I2D 16 SD I2D digital 1 8 V supply voltage VSS ADAC 100 GD audio DAC 1 8 V digital ground VDDD ADAC 101 SD audio DAC 1 8 V digital supply voltage VDD3 DTC 23 SD DTC 3 3 V supply voltage VDDD DTC 24 SD DTC 1 8 V supply voltage Table 16 Analog supply pins Symbol Pin Type Description VSSA I2D 6 GA I2D analog ground VDDA I2D 11 SA I2D analog 1 8 V supply voltag...

Page 13: ...P Processing analog and digital audio sources Data Capture Unit DCU Acquires VBI data Teletext CC VPS and formats in a stream Formatter unit ITU 656 Formats YUV VBI data and CVBS data in ITU 656 Bus Control Unit BCU Bus arbitration among all the internal blocks Table 17 Block function continued Function Block Description Table 18 Interfaces Interface Description I2C bus The PNX2000 IC is controlle...

Page 14: ...CAM decoding B G I D K and L standard Two carrier multi standard FM demodulation B G D K and M standard Decoding for three analog multi channel systems A2 A2 and A2 and satellite sound Adaptive de emphasis for satellite FM Optional AM demodulation for system L simultaneously with NICAM Identification A2 systems B G D K and M standard with different identification time constants FM pilot carrier pr...

Page 15: ...ogic II delay Pseudo hall matrix function Psychoacoustic spatial algorithms downmix and split Incredible Mono Incredible Stereo Virtual Dolby Surround Virtual Dolby Digital Bass Redirection according to Dolby specifications BBE Sound Processing 4 Interfaces and switching Digital audio input interface stereo I2S bus input interface Digital audio output interface stereo I2S bus output interface Digi...

Page 16: ... single stream of analog video 1fH or 2fH broadcast signals PNX2000 performs the following main functions Color decoding into ITU 601 compatible format 1fH or 2fH A digital interface to external 3D comb filter VBI data capture Teletext WSS CC ITU 656 formatting for communication to PNX8550 Audio demodulation and decoding Audio processing and D A conversion The audio data is transferred between PNX...

Page 17: ... characteristics Table 19 Absolute maximum ratings Ratings are valid only within operating temperature range unless otherwise specified All voltages are with respect to VSS unless otherwise stated Symbol Parameter Min Max Unit VDD core supply voltage 0 5 2 5 V VDD I O supply voltage 0 5 4 6 V VI DC input voltage 1 2 and 3 0 5 VDD I O 0 5 V VI DC input voltage 5V tolerant I O pins 2 and 3 0 5 6 V I...

Page 18: ... TMS IIH HIGH level input current Vi VDD I O 1 µA VI input voltage 0 5 5 V VIH HIGH level input voltage 2 0 V VIL LOW level input voltage 0 8 V Vhys hysteresis voltage 0 3 V IPU pull up current Vi 0 25 50 65 µA VDD I O Vi 5 V 0 0 0 µA I2C Pins I2C_SDA I2C_SCL CI input capacitance 5 pF ILI input leakage current 1 VDD 3V3 3 3 V Tamb 25 C 1 37 1 85 2 45 µA IIN MAX max input current 2 at 5 V 8 20 10 7...

Page 19: ...H level output voltage IOH 4 mA 2 4 V VOL LOW level output voltage IOL 4 mA 0 4 V IOH HIGH level output current VOH 2 4 4 mA IOL LOW level output current VOL 0 4V 4 mA IOH HIGH level short circuit current VOH 0 45 mA IOL LOW level short circuit current VOL VDD I O 50 mA I2S Output I2S_OUT_SD3_SCK I2S_OUT_SD3_WS ADAC_CLK Clock Output DCLK VOH HIGH level output voltage IOH 8 mA 2 4 V VOL LOW level o...

Page 20: ...nce across input diff pair 100 Ω VDATA pos data pos range 0 300 mV VDATA neg data neg range 0 300 mV VSTROBE pos strobe pos range 0 300 mV VSTROBE neg strobe neg range 0 300 mV Audio DACs ADAC1 12P ADAC1 12N VREFP positive reference voltage 3 0 3 3 3 6 V VREFN negative reference voltage 0 V IREFP positive reference current 820 µA Audio DACs ADAC1 12 VOUT rms output voltage rms single ended digital...

Page 21: ...s slave mode 35 65 tRSCK SCK rise fall time I2S bus master mode Cload 30 pF 5 ns tRSCK SCK rise fall time I2S bus slave mode fSCK 3 072 MHz 50 ns td delay time SCK to WS and SD outputs 2 TSCK 1 fSCK 0 3 0 5 0 7 TSCK th hold time SCK to WS and SD inputs 0 ns ts setup time WS and SD inputs to SCK TSCK 1 fSCK 0 2 TSCK I2D fclock WORD word clock frequency 13 5 MHz WL word length 44 bit DR data rate 59...

Page 22: ... of 128 fS using a noise shaper circuit to shift the quantization noise to out of band frequencies To prevent HF overloading of the circuit that is driven by the DAC outputs a 3 3 nF capacitor should be used to filter off the HF signal content Together with the DAC s nominal output impedance of 1 kΩ a first order roll off at approximately 50 kHz will result One capacitor is required for each DAC o...

Page 23: ...mperature range 20 to 70 oC Load capacitance 30 pF Fig 4 Application diagram a slave test mode b oscillation mode Table 25 Primary clock settings Clock Crystal Input Divider setting Clock frequency 27 MHz x 1 27 MHz 27 MHz x 2 13 5 MHz 13 5 MHz x 1 13 5 MHz 13 5 MHz x 2 6 75 MHz Table 26 Crystal parameters Oscillator frequency fc Crystal load capacitance CL Max crystal series resistance RS Externa...

Page 24: ...Semiconductors PNX2000 Audio video input processor 10 4 2 Reset 10 4 3 ITU 656 RESET_N pin and internal reset timing Fig 5 PNX2000 reset RESET_N internal reset long external reset produces internal reset short spike ignored mce561 tlow tpulse thigh Fig 6 Timing ITU interface DVO_CLK DVO_DATA 9 0 DVO_VALID mce562 tsu DATA th DATA ...

Page 25: ...ltraBass DVD Digital Video Disc EIAJ Electronic Industries Association of Japan GTU Global Task Unit HBM Human Body Model LQFP Low profile Quad Flat Package MM Machine Model MPX Multiplexer NICAM Near Instantaneous Compounded Audio Multiplex NTSC National TV Systems Committee PAL Phase Alternate Line SAP Secondary Audio Program SCART Syndicate for Constructors of Apparatus for Radio and Television...

Page 26: ...05 1 45 1 35 0 25 0 27 0 17 0 20 0 09 20 1 19 9 0 5 22 15 21 85 1 4 1 1 7 0 o o 0 08 0 2 0 08 1 DIMENSIONS mm are the original dimensions Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included 0 75 0 45 SOT486 1 136E23 MS 026 00 03 14 03 02 20 D 1 1 1 20 1 19 9 HD 22 15 21 85 E Z 1 4 1 1 D 0 5 10 mm scale bp e θ E A1 A Lp detail X L A 3 B c bp E H A2 D H v M B D ZD A ZE e...

Page 27: ...r convection infrared heating in a conveyor type oven Throughput times preheating soldering and cooling vary between 100 and 200 seconds depending on heating method Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material The top surface temperature of the packages should preferably be kept below 220 C SnPb process or below 245 C Pb free process for all BGA and S...

Page 28: ...ions 13 4 Manual soldering Fix the component by first soldering two diagonally opposite end leads Use a low voltage 24 V or less soldering iron applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C 13 5 Package related soldering informati...

Page 29: ...tsink on the top side the solder might be deposited on the heatsink surface 5 If wave soldering is considered then the package must be placed at a 45 angle to the solder wave direction The package footprint must incorporate solder thieves downstream and at the side corners 6 Wave soldering is suitable for LQFP QFP and TQFP packages with a pitch e larger than 0 8 mm it is definitely not suitable fo...

Page 30: ...tations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified 18 Licenses 19 Trademarks Nexperia is a trademark of Koninklijke Philips Electronics N V Dolby Pro Logic Virtual Dolby Digital and Virtual Dolby Surround are trademarks of Dolby Laboratories nc BBE is a registered trademark of BBE Sound Inc dbx is a registered tradema...

Page 31: ...1 Contents 1 General description 1 2 Features 1 3 Applications 1 4 Ordering information 2 5 Block diagram 2 6 Pinning information 3 6 1 Pinning 3 6 1 1 Pin description 3 7 Functional description 12 7 1 Overview 12 7 2 Interfaces 13 7 3 Features in detail 13 7 3 1 Video 13 7 3 2 Audio 14 8 Television application 16 9 Limiting values 17 10 Characteristics 17 10 1 Static characteristics 17 10 2 Dynam...

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